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SP9841 数据表(PDF) 3 Page - Sipex Corporation

部件名 SP9841
功能描述  8-Bit Octal, 2-Quadrant Multiplying, BiCMOS DAC
PDF  32 Pages
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制造商  SIPEX [Sipex Corporation]
网页  http://www.sipex.com
标志 SIPEX - Sipex Corporation

SP9841 数据表(HTML) 3 Page - Sipex Corporation

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SPECIFICATIONS (continued)
(V
DD = +5V, All VINX= +1.625V, VREFL = 0V, TA = 25° C for commercial–grade parts;
T
MIN ≤ TA =
T
MAX for industrial–grade parts; specifications apply to
all DAC's unless noted otherwise.)
PARAMETER
MIN.
TYP.
MAX.
UNIT
CONDITIONS
DYNAMIC PERFORMANCE
SINAD
85
dB
V
INX = 0.8VDC + 1.4V p-p
D= FF
H; 1kHz, fLP = 80 kHz
Digital Crosstalk
6
nVs
SP9842 only; measured
between adjacent channels of
same pair; D = 7F
H to 80H
DAC OUTPUTS
Voltage Range
0
V
DD–1.5
V
R
L = 5kΩ; VDD = 4.75V
Output Current
±10
±15
mA
∆V
OUT < 10mV, VINX=1.625V,
PR = LOW
Capacitive Load
47,000
pF
No Oscillation
DIGITAL OUTPUT
Logic High
3.5
V
I
OH = -0.4mA
Logic Low
0.4
V
I
OL = 1.6mA
POWER REQUIREMENTS
Power Supply Range
4.75
5.00
5.25
V
To rated specifications
Positive Supply Current
13
mA
PR = LOW
Power Dissipation
65
mW
ENVIRONMENTAL AND MECHANICAL
Operating Temperature Range
Commercial
0
+70
°C
Industrial
–40
+85
°C
Storage Temperature Range
–65
+150
°C
Package
SP9841N
24–pin Plastic DIP
SP9841S
24–pin SOIC
SP9842S
20–pin SOIC
Note 3
Notes:
1
The op amp limits the linearity for V
OUT ≤ 100mV. When VREFL is driven above ground such that the
output voltage remains above 100mV, then the linearity specifications apply to all codes. For V
REFL =
GND, V
IN = 1.5V, codes 0 through 7 are not included in differential or integral linearity tests. Integral
and differential linearity are computed with respect to the best fit straight line through codes 8
through 255.
2
SP9841 is measured between adjacent channels, f = 100kHz; SP9842 is measured between
adjacent pairs, f = 100kHz.
3
For plastic DIP packaging of SP9842, please consult factory.



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