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ADL8121ACPZN-R7 数据表(PDF) 20 Page - Analog Devices |
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ADL8121ACPZN-R7 数据表(HTML) 20 Page - Analog Devices |
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20 / 22 page ![]() Data Sheet ADL8121 APPLICATIONS INFORMATION analog.com Rev. 0 | 20 of 22 RECOMMENDED BIAS SEQUENCING Correct sequencing of the dc and RF power is required to safely operate the ADL8121. During power-up, apply VDD before the RF power is applied to RFIN, and during power off, remove the RF power from RFIN before VDD is powered off. See the ADL8121-EVALZ user guide for the recommended bias sequencing information. During Power-Up The recommended bias sequence during power-up is as follows: 1. Set VDD to 5 V. 2. Apply the RF signal. During Power-Down The recommended bias sequence during power-down is as follows: 1. Turn off the RF signal. 2. Set VDD to 0 V. RECOMMENDED POWER MANAGEMENT CIRCUIT Figure 81 shows a recommended power management circuit for the ADL8121. The LT8607 step-down regulator is used to step down a 12 V rail to 6.62 V, which is then applied to the LT3042 low dropout (LDO) linear regulator to generate a low noise 5 V output. While the circuit shown in Figure 81 has an input voltage (VIN) of 12 V, the input range to the LT8607 can be as high as 42 V. The 6.62 V regulator output of the LT8607 is set by the R2 and R3 resistors according to the following equation: R2 = R3((VOUT/0.778 V) − 1), where VOUT is the output voltage. The switching frequency is set to 2 MHz by the 18.2 kΩ resistor on the RT pin. The LT8607 data sheet provides a table of resistor values that can be used to select other switching frequencies ranging from 0.2 MHz to 2.2 MHz. The output voltage of the LT3042 is set by the R4 resistor connect- ed to the SET pin according to the following equation: VOUT = 100 μA × R4 The PGFB resistors are chosen to trigger the power-good (PG) signal when the output is just under 95% of the target voltage of 5 V. The output of the LT3042 has 1% initial tolerance and another 1% variation over temperature. The PGFB tolerance is roughly 3% over temperature and adding resistors results in a bit more (5%), therefore, putting 5% between the output and the PGFB resistors works well. In addition, the PG open-collector is pulled up to the 5 V output to give a convenient 0 V to 5 V voltage range. Table 8 provides the recommended resistor values for operation at 5 V to 2 V. Table 8. Recommended Resistor Values for Operating from 5 V to 2 V LDO VOUT (V) R4 (kΩ) R7 (kΩ) R8 (kΩ) 5 51.1 464 28.7 4 42.2 383 28.7 3 31.6 261 28.7 2 21.5 178 28.7 Figure 81. Recommended Power Management Circuit |
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