MCP79510 datasheet(29/58 Pages) MICROCHIP

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DS20002300D-page 29

MCP7951X/MCP7952X

TABLE 5-9:

SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK OUTPUT CONFIGURATION

CONTROL: RTCC CONTROL REGISTER (ADDRESS 0x08)

U-x

R/W-0

—

SQWEN

ALM1EN

ALM0EN

EXTOSC

CRSTRIM

SQWFS1

SQWFS0

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

-n = Value at POR

‘1’ = Bit is set

‘0’ = Bit is clear

x = Bit is unknown

bit 7

Unimplemented: Read as ‘1’

bit 6

SQWEN: Square Wave Output Enable bit

1 = Enable Square Wave Clock Output mode

0 = Disable Square Wave Clock Output mode

bit 5

ALM1EN: Alarm 1 Module Enable bit

1 = Alarm 1 enabled

0 = Alarm 1 disabled

bit 4

ALM0EN: Alarm 0 Module Enable bit

1 = Alarm 0 enabled

0 = Alarm 0 disabled

bit 3

EXTOSC: External Oscillator Input bit

1 = Enable X1 pin to be driven by external 32.768 kHz source

0 = Disable external 32.768 kHz input

bit 2

CRSTRIM: Coarse Trim Mode Enable bit

Coarse Trim mode results in the MCP795XX applying digital trimming every second.

1 = Enable Coarse Trim mode. If SQWEN = 1, CLKOUT will output trimmed 1 Hz(1) nominal clock

signal.

0 = Disable Coarse Trim mode

See Section 5.6 “Digital Trimming” for details

bit 1-0

SQWFS<1:0>: Square Wave Clock Output Frequency Select bits

If SQWEN = 1 and CRSTRIM = 0:

Selects frequency of clock output on CLKOUT

00 = 1 Hz(1)

01 = 4.096 kHz(1)

10 = 8.192 kHz(1)

11 = 32.768 kHz

If SQWEN = 0 or CRSTRIM = 1:

Unused

Note 1: The 8.192 kHz, 4.096 kHz, and 1 Hz square wave clock output frequencies are affected by digital

trimming.

Name

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

on Page

CONTROL

—

SQWEN

ALM1EN

ALM0EN

EXTOSC

CRSTRIM

SQWFS1

SQWFS0

Legend:

— = unimplemented location, read as ‘0’. Shaded cells are not used in clock output configuration.

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