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DG412LE 数据表(PDF) 10 Page - Vishay Siliconix |
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DG412LE 数据表(HTML) 10 Page - Vishay Siliconix |
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10 / 17 page ![]() DG411LE, DG412LE, DG413LE www.vishay.com Vishay Siliconix S19-0672-Rev. B, 05-Aug-2019 10 Document Number: 78091 For technical questions, contact: analogswitchsupport@vishay.com THIS DOCUMENT IS SUBJECT TO CHANGE WITHOUT NOTICE. THE PRODUCTS DESCRIBED HEREIN AND THIS DOCUMENT ARE SUBJECT TO SPECIFIC DISCLAIMERS, SET FORTH AT www.vishay.com/doc?91000 TEST CIRCUITS Fig. 2 - Switching Time Fig. 3 - Break-Before-Make (DG413LE) Fig. 4 - Charge Injection 0 V Logic Input Switch Input* Switch Output 3 V 50% 0 V Switch Input* VS tr < 20 ns tf < 20 ns 90 % - VS tON tON VO 90 % VO Note: Logic input waveform is inverted for switches that have the opposite logic sense control CL (includes fixture and stray capacitance) V+ IN RL RL + rDS(on) VO = VS S D V- VO GND VL CL 35 pF V- RL 300 Ω VL V+ VS 0 V Logic Input Switch Switch Output 3 V 50 % 0 V Output 0 V 90 % VO2 VO1 90 % VS1 VS2 tD tD VO2 CL (includes fixture and stray capacitance) V+ S2 V- S1 VL VS2 IN2 D2 VS1 RL2 300 Ω D1 VO1 CL2 35 pF GND RL1 300 Ω CL1 35 pF IN1 V- CL 10 nF D Rg VO V+ S V- 3 V IN VL Vg GND OFF ON OFF OFF ON OFF VO ΔVO INX INX Q = ΔVO x CL INX dependent on switch configuration Input polarity determined by sense of switch. V- V+ VL |
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