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ADUC7023BCPZ62I-R7 数据表(PDF) 45 Page - Analog Devices |
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ADUC7023BCPZ62I-R7 数据表(HTML) 45 Page - Analog Devices |
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45 / 98 page  Data Sheet ADuC7023 Rev. H | Page 45 of 98 Table 38. RSTCFG MMR Bit Designations Bit Description 7 to 3 Reserved. Always set to 0. 2 This bit is set to 1 to configure the DAC outputs to retain their state after a watchdog or software reset. This bit is cleared for the DAC pins and registers to return to their default state. 1 Reserved. Always set to 0. 0 This bit is set to 1 to configure the GPIO pins to retain their state after a watchdog or software reset. This bit is cleared for the GPIO pins and registers to return to their default state. RSTKEY1 Register Name: RSTKEY1 Address: 0xFFFF0248 Default value: 0xXX Access Write RSTKEY2Register Name: RSTKEY2 Address: 0xFFFF0250 Default value: 0xXX Access: Write Table 39. RSTCFG Write Sequence Name Code RSTKEY1 0x76 RSTCFG User value RSTKEY2 0xB1 |
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