9

2

28

STS

DGND

12/8

CS

A0

R/C

CE

THREE–STATE BUFFERS AND CONTROL

NIBBLE A

NIBBLE B

NIBBLE C

27

26

25

24

23

22

21 20

19 18

17 16

OUTPUT BITS

MSB

LSB

3

4

5

6

CONTROL

LOGIC

OSCILLATOR

12–BITS

12–BITS

SAMPLE/HOLD

CDAC

LSB

MSB

OFFSET/GAIN

TRIM NETWORK

REF

REF

AMP

1µF

1

15

VLOGIC

+5V

711

VCC

1µF

9

AGND

+15V

NO CONNNECTION

PERMITTED

8

10

VREF

OUT

VREF

IN

R2

100Ω

R1

100K

100K

-15V

+15V

100Ω

10V

IN

20V

IN

BIP

OFF

13

14

12

ANALOG

INPUTS

0TO10V

0TO20V

12–BIT SAR

COMP

STROBE

Figure 4. Unipolar Input Connections

Figure 5. Bipolar Input Connections

2

28

STS

DGND

12/8

CS

A0

R/C

CE

THREE–STATE BUFFERS AND CONTROL

NIBBLE A

NIBBLE B

NIBBLE C

27

26

25

24

23

22

21 20

19 18

17 16

OUTPUT BITS

MSB

LSB

3

4

5

6

CONTROL

LOGIC

OSCILLATOR

12–BITS

12–BITS

SAMPLE/HOLD

CDAC

LSB

MSB

OFFSET/GAIN

TRIM NETWORK

REF

REF

AMP

1µF

1

15

VLOGIC

+5V

711

VCC

1µF

9

AGND

+15V

NO CONNECTION

PERMITTED

8

10

VREF

OUT

VREF

IN

100Ω

R1

10V

IN

20V

IN

BIP

OFF

13

14

12

ANALOG

INPUTS

12–BIT SAR

COMP

STROBE

100Ω

R2

±5V

±10V

and digital sections), and grounding. Digital

timing, calibration and the analog signal source

must be considered for correct operation.

To achieve specified accuracy, a double–sided

printed circuit board with a copper ground plane

on the component side is recommended. Keep

analog signal traces away from digital lines. It is

best to lay the PC board out such that there is an

analog section and a digital section with a single

point ground connection between the two through

an RF bead. If this is not possible, run analog