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ATAR080 数据表(PDF) 39 Page - ATMEL Corporation |
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ATAR080 数据表(HTML) 39 Page - ATMEL Corporation |
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39 / 68 page ![]() 39 ATAR080 4675D–4BMCU–12/04 Timer 2 Mode Register 2 (T2M2) Note: If one of these output modes is used, the T2O alternate function of Port 4 must also be activated. Timer 2 Compare and Compare Mode Registers Timer 2 has two separate compare registers, T2CO1 for the 4-bit stage and T2CO2 for the 8-bit stage of Timer 2. The timer compares the contents of the compare register cur- rent counter value, and if it matches, it generates an output signal. Depending on the timer mode, this signal is used to generate a timer interrupt, to toggle the output flip-flop as SSI clock or as a clock for the next counter stage. In the 12-bit timer mode, T2CO1 contains bits 0 to 3 and T2CO2 bits 4 to 11 of the 12-bit compare value. In all other modes, the two compare registers work independently as a 4- and 8-bit compare register. When assigned to the compare register a compare event will be suppressed. Address: ’7’hex - Subaddress: ’2’hex Bit 3 Bit 2 Bit 1 Bit 0 T2M2 T2TOP T2OS2 T2OS1 T2OS0 Reset value: 1111b T2TOP Timer 2 Toggle Output Preset This bit allows the programmer to preset the Timer 2 output T2O. T2TOP = 0, resets the toggle outputs with the write cycle (M2 = 0) T2TOP = 1, sets toggle outputs with the write cycle (M2 = 1) Note: If T2R = 1, no output preset is possible T2OS2 Timer 2 Output Select bit 2 T2OS1 Timer 2 Output Select bit 1 T2OS0 Timer 2 Output Select bit 0 Table 18. Timer 2 Output Select Bits Output Mode T2OS2 T2MS1 T2MS0 Clock Output 11 11 Toggle mode: a Timer 2 compare match toggles the output flip-flop (M2) →T2O 21 10 Duty cycle burst generator 1: the DCG output signal (DCG0) is given to the output and gated by the output flip-flop (M2) 31 01 Duty cycle burst generator 2: the DCG output signal (DCGO) is given to the output and gated by the SSI internal data output (SO) 41 00 Bi-phase modulator: Timer 2 modulates the SSI internal data output (SO) to Bi-phase code 50 11 Manchester modulator: Timer 2 modulates the SSI internal data output (SO) to Manchester code 60 10 SSI output: T2O is used directly as SSI internal data output (SO) 7 0 0 1 PWM mode: an 8/12-bit PWM mode 80 00 Not allowed |
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