K4M51163PC - R(B)E/G/C/F

February 2006

Mobile SDRAM

FEATURES

GENERAL DESCRIPTION

8M x 16Bit x 4 Banks Mobile SDRAM in 54FBGA

Address configuration

Organization

Bank

Row

Column Address

32M x 16

BA0, BA1

A0 - A12

A0 - A9

INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS, AND IS SUBJECT TO CHANGE WITHOUT NOTICE.

NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,

TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL INFORMATION IN THIS DOCUMENT IS PRO-

VIDED ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.

1. For updates or additional information about Samsung products, contact your nearest Samsung office.

2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where Product failure could

result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or pro-

visions may apply.

• 1.8V power supply.

• LVCMOS compatible with multiplexed address.

• Four banks operation.

• MRS cycle with address key programs.

-. CAS latency (1, 2 & 3).

-. Burst length (1, 2, 4, 8 & Full page).

-. Burst type (Sequential & Interleave).

• EMRS cycle with address key programs.

• All inputs are sampled at the positive going edge of the system

clock.

• Burst read single-bit write operation.

• Special Function Support.

-. PASR (Partial Array Self Refresh).

-. Internal TCSR (Temperature Compensated Self Refresh)

-. DS (Driver Strength)

-. DPD (Deep Power Down Mode)

• DQM for masking.

• Auto refresh.

• 64ms refresh period (8K cycle).

• Commercial Temperature Operation (-25

°C ~ 70°C).

• Extended Temperature Operation (-25

°C ~ 85°C).

• 54Balls FBGA (-RXXX : Pb, -BXXX : Pb Free).

The K4M51163PC is 536,870,912 bits synchronous high data

rate Dynamic RAM organized as 4 x 8,388,608 words by 16 bits,

fabricated with SAMSUNG’s high performance CMOS technol-

ogy. Synchronous design allows precise cycle control with the

use of system clock and I/O transactions are possible on every

clock cycle. Range of operating frequencies, programmable

burst lengths and programmable latencies allow the same

device to be useful for a variety of high bandwidth and high per-

formance memory system applications.

ORDERING INFORMATION

- R(B)E/G : Normal/Low Power, Extended Temperature(-25

°C ~ 85°C)

- R(B)C/F : Normal/Low Power, Commercial Temperature(-25

°C ~ 70°C)

Notes :

1. In case of 40MHz Frequency, CL1 can be supported.

Part No.

Max Freq.

Interface

Package

K4M51163PC-R(B)E/G/C/F75

133MHz(CL=3), 83MHz(CL=2)

LVCMOS

54 FBGA Pb

(Pb Free)

K4M51163PC-R(B)E/G/C/F90

111MHz(CL=3), 83MHz(CL=2)

K4M51163PC-R(B)E/G/C/F1L