TLF6428

September 1991

DM54LS366ADM74LS366A

Hex TRI-STATE

Inverting Buffer

General Description

This device contains six independent gates each of which

performs an inverting buffer function The outputs have the

TRI-STATE feature When enabled the outputs exhibit the

low impedance characteristics of a standard LS output with

additional drive capability to permit the driving of bus lines

without external resistors When disabled both the output

transistors are turned off presenting a high-impedance state

to the bus line Thus the output will act neither as a signifi-

cant load nor as a driver To minimize the possibility that two

outputs will attempt to take a common bus to opposite logic

levels the disable time is shorter than the enable time of the

outputs

Connection Diagram

Dual-In-Line Package

TLF6428 – 1

Order Number DM54LS366AJ DM54LS366AW

DM54LS366AE DM74LS366AM or DM74LS366AN

See NS Package Number E20A J16A M16A N16E or W16A

Function Table

Inputs

Output

G1G2A

Y

H

X

X

Hi-Z

X

H

X

Hi-Z

LL

L

H

LL

H

L

TRI-STATE

is a registered trademark of National Semiconductor Corporation

C1995 National Semiconductor Corporation

RRD-B30M105Printed in U S A