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BGS8458Z 数据表(PDF) 6 Page - NXP Semiconductors

部件名 BGS8458Z
功能描述  WLAN LNA Switch
PDF  13 Pages
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制造商  NXP [NXP Semiconductors]
网页  http://www.nxp.com
标志 NXP - NXP Semiconductors

BGS8458Z 数据表(HTML) 6 Page - NXP Semiconductors

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NXP Semiconductors
BGS8458
WLAN LNA + Switch
BGS8458
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2019. All rights reserved.
Product data sheet
Rev. 2 — 24 September 2019
6 / 13
Symbol
Parameter
Conditions
Min Typ
Max
Unit
RF performance at ANT-RX path in, bypass receive mode[1]
Gtr
transducer power gain
-9
-7
-5
dB
Gp(flat)
power gain flatness
peak-to-peak over any
80 MHz band
-
-
0.5
dB
Pi(1dB)
input power at 1 dB gain compression
in-band
-
17
-
dBm
IP3i
input third-order intercept point
20 MHz tone spacing;
Pi = -3 dBm per tone
-
29
-
dBm
RLin
input return loss
-
10
-
dB
RLout
output return loss
-
10
-
dB
RF performance at ANT-TX path in transmit mode [1]
αins
insertion loss
-
0.7
-
dB
Gp(flat)
power gain flatness
peak-to-peak over any
80 MHz band
-
-
0.2
dB
ISL
isolation
measured between pin RX
and pin TX
-
30
-
dB
Pi(1dB)
input power at 1 dB gain compression
in-band
-
32
-
dBm
RLin
input return loss
-
13
-
dB
RLout
output return loss
-
13
-
dB
[1]
See Table 11 for the appropriate control signal settings.
Table 11. Control signal truth table
Other modes than the ones given in this table are not allowed.
Control signal setting [1]
Mode of operation
VC0
VC1
SP2T switch
(pin 5)
(pin 2)
ANT-RX
ANT-TX
LNA
Mode name
LOW
HIGH
ON
OFF
ON
high-gain receive mode
LOW
LOW
ON
OFF
OFF
bypass receive mode
HIGH
LOW
OFF
ON
OFF
transmit mode
[1]
A logic LOW is the result of an input voltage on that specific pin between 0 V and 0.5 V.
A logic HIGH is the result of an input voltage on that specific pin between 1.62 V and VCC1 - 0.2 V and 3.6 V maximum.



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