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SWCS049B 数据表(PDF) 80 Page - Texas Instruments |
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SWCS049B 数据表(HTML) 80 Page - Texas Instruments |
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80 / 144 page  80 TPS65911 SWCS049S – JUNE 2010 – REVISED AUGUST 2018 www.ti.com Submit Documentation Feedback Product Folder Links: TPS65911 Detailed Description Copyright © 2010–2018, Texas Instruments Incorporated Table 6-34. VRTC_REG Address Offset 0x1E Instance Reset Domain: GENERAL RESET Description VRTC internal regulator control register Type RW 7 6 5 4 3 2 1 0 Reserved VRTC_ OFFMASK Reserved ST Bits Field Name Description Type Reset 7:4 Reserved Reserved bit RO R returns 0s 0x0 3 VRTC_OFFMASK VRTC internal regulator off mask signal: when 1, the regulator keeps its full-load capability during device OFF state. when 0, the regulator will go to low-power mode during device OFF state. Note that VRTC is put in low-power mode when the device is on backup even if this bit is set to 1 (Default value: See boot configuration) RW 0 2 Reserved Reserved bit RO R returns 0s 0 1:0 ST Reference state: ST[1:0] = 00: Reserved ST[1:0] = 01: On high power (ACTIVE) ST[1:0] = 10: Reserved ST[1:0] = 11: On low power (SLEEP) (Write access available in test mode only) RO 0x1 |
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