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23K256-E/ST 数据表(PDF) 13 Page - Microchip Technology |
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23K256-E/ST 数据表(HTML) 13 Page - Microchip Technology |
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13 / 27 page ![]() 2008-2022 Microchip Technology Inc. and its subsidiaries DS20002100G-page 13 23A256/23K256 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. 3.1 Chip Select (CS) A low level on this pin selects the device. A high level deselects the device and forces it into Standby mode. When the device is deselected, SO goes to the high-impedance state, allowing multiple parts to share the same SPI bus. After power-up, a low level on CS is required, prior to any sequence being initiated. 3.2 Serial Output (SO) The SO pin is used to transfer data out of the 23X256. During a read cycle, data is shifted out on this pin after the falling edge of the serial clock. 3.3 Serial Input (SI) The SI pin is used to transfer data into the device. It receives instructions, addresses and data. Data is latched on the rising edge of the serial clock. 3.4 Serial Clock (SCK) The SCK is used to synchronize the communication between a host and the 23X256. Instructions, addresses or data present on the SI pin are latched on the rising edge of the clock input, while data on the SO pin is updated after the falling edge of the clock input. 3.5 Hold (HOLD) The HOLD pin is used to suspend transmission to the 23X256 while in the middle of a serial sequence without having to retransmit the entire sequence again. It must be held high any time this function is not being used. Once the device is selected and a serial sequence is underway, the HOLD pin may be pulled low to pause further serial communication without resetting the serial sequence. The HOLD pin must be brought low while SCK is low, otherwise the HOLD function will not be invoked until the next SCK high-to-low transition. The 23X256 must remain selected during this sequence. The SI, SCK and SO pins are in a high-impedance state during the time the device is paused and transitions on these pins will be ignored. To resume serial communication, HOLD must be brought high while the SCK pin is low, otherwise serial communication will not resume. Lowering the HOLD line at any time will tri-state the SO line. Hold functionality is disabled by the STATUS register bit. TABLE 3-1: PIN FUNCTION TABLE Name PDIP SOIC TSSOP Function CS 1 1 1 Chip Select Input SO 2 2 2 Serial Data Output VSS 444 Ground SI 5 5 5 Serial Data Input SCK 6 6 6 Serial Clock Input HOLD 7 7 7 Hold Input VCC 8 8 8 Supply Voltage |
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