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AM6422...ALV 数据表(PDF) 52 Page - Texas Instruments

部件名 AM6422...ALV
功能描述  AM64x Sitara™ Processors
PDF  244 Pages
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制造商  TI [Texas Instruments]
网页  http://www.ti.com
标志 TI - Texas Instruments

AM6422...ALV 数据表(HTML) 52 Page - Texas Instruments

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Table 6-1. Pin Attributes (ALV Package) (continued)
BALL
NUMBER [1]
BALL NAME [2]
PADCONFIG Register [15]
PADCONFIG Address [16]
SIGNAL NAME [3]
MUX
MODE
[4]
TYPE
[5]
DSIS
[6]
BALL
STATE
DURING
RESET
RX/TX/PULL [7]
BALL
STATE
AFTER
RESET
RX/TX/PULL [8]
MUX
MODE
AFTER
RESET
[9]
I/O
OPERATING
VOLTAGE [10]
POWER [11]
HYS
[12]
BUFFER
TYPE [13]
PULL
UP/DOWN
TYPE [14]
Y13
PRG1_PRU1_GPO18
PADCONFIG:
PADCONFIG84
0x000F4150
PRG1_PRU1_GPO18
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
PRG1_PRU1_GPI18
1
I
0
PRG1_IEP1_EDC_LATCH_IN0
2
I
0
PRG1_PWM1_TZ_IN
3
I
0
RGMII1_RD2
4
I
0
RMII1_TX_EN
5
O
GPIO0_20
7
IO
pad
UART5_CTSn
8
I
1
PRG1_ECAP0_SYNC_IN
9
I
0
V12
PRG1_PRU1_GPO19
PADCONFIG:
PADCONFIG85
0x000F4154
PRG1_PRU1_GPO19
0
IO
0
Off / Off / Off
Off / Off / Off
7
1.8 V/3.3 V
VDDSHV2
Yes
LVCMOS
PU/PD
PRG1_PRU1_GPI19
1
I
0
PRG1_IEP1_EDC_SYNC_OUT0
2
O
PRG1_PWM1_TZ_OUT
3
O
RGMII1_RD3
4
I
0
RMII1_CRS_DV
5
I
0
SPI3_CS2
6
IO
1
GPIO0_84
7
IO
pad
UART5_RTSn
8
O
PRG1_ECAP0_IN_APWM_OUT
9
IO
0
F16
RESETSTATz
PADCONFIG:
PADCONFIG169
0x000F42A4
RESETSTATz
0
O
Off / Low / Off
Off / SS / Off
0
1.8 V/3.3 V
VDDSHV0
Yes
LVCMOS
PU/PD
E18
RESET_REQz
PADCONFIG:
PADCONFIG168
0x000F42A0
RESET_REQz
0
I
On / Off / Up
On / Off / Up
0
1.8 V/3.3 V
VDDSHV0
Yes
LVCMOS
PU/PD
H16
RSVD0
RSVD0
N/A
D21
RSVD1
RSVD1
N/A
G13
RSVD2
RSVD2
N/A
F17
RSVD3
RSVD3
N/A
W15
RSVD4
RSVD4
N/A
V16
RSVD5
RSVD5
N/A
K2
RSVD6
RSVD6
N/A
K1
RSVD7
RSVD7
N/A
F12
RSVD8
RSVD8
N/A
AM6442, AM6441, AM6421, AM6412, AM6411
SPRSP56D – JANUARY 2021 – REVISED JULY 2022
www.ti.com
52
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Copyright © 2022 Texas Instruments Incorporated
Product Folder Links: AM6442 AM6441 AM6421 AM6412 AM6411



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