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8.4.2.18 Serializer/Deserializer (SerDes)

Integrated in the MAIN domain is one instance of high-speed differential interface implemented with Serializer/

Deserializer (SERDES) Multi-protocol Multi-link modules with the following main blocks:

• Single-lane PHY with common module for peripheral and Tx clocking handling

• Physical coding sub-block for data translation from/to the parallel interface, as well as data encoding/

decoding and symbol alignment

• MUX module for device interface multiplexing into a single SERDES lane (Tx and Rx)

• A wrapper for sending control and reporting status signals from the SerDes and muxes

For more information, see Serializer/Deserializer (SerDes) section in Peripherals chapter in the device TRM.

8.4.2.19 Real Time Interrupt (RTI/WWDT)

This section describes the Real Time Interrupt (RTI) modules with Windowed Watchdog Timer (WWDT)

functionality for the device.

For more information, see Real Time Interrupt (RTI/WWDT) Module section in Peripherals chapter of the device

TRM.

8.4.2.20 Dual Mode Timer (DMTIMER)

The Dual Mode Timer (DMTIMER) module supports the following main features:

• Interrupts generated on overflow, compare, and capture events

• Free running 32-bit upward counter

• Supported operating modes:

– Compare and capture modes

– Auto-reload mode

– Start-stop mode

• Programmable divider clock source (2n with n=[0:8])

• Dedicated input trigger for capture mode, and dedicated output trigger/PWM (pulse width modulation) signal

• On the fly read/write register (while counting)

• Generate 1-ms tick with 32768-Hz functional clock

For more information, see Timers section in Peripherals chapter in the device TRM.

8.4.2.21 UART

The UART module supports the following main features:

• 16C750 compatibility

• Baud rate from 300 bps up to 3.6864 Mbps (subject to functional clock frequency)

• Auto-baud between 1200 bps and 115.2 Kbps

• Software/hardware flow control

– Programmable Xon/Xoff characters

– Programmable Auto-RTS and Auto CTS

• Programmable serial interface characteristics

– 5-, 6-, 7-, 8-bit characters

– Even, odd, mark (always 1), space (always 0), or no parity (non-parity bit frame) bit generation and

detection

– 1-, 1.5-, or 2-stop bit generation

• Optional multi-drop transmission

• Configurable time-guard feature

• False start bit detection

• Line break generation and detection

• Modem control functions on UART0 (CTS, RTS, DSR, DTR, RI, and DCD)

• Fully prioritized interrupt system controls

• Internal test and loopback capabilities

• RS-485 External transceiver auto flow control support

AM6442, AM6441, AM6421, AM6412, AM6411

SPRSP56D – JANUARY 2021 – REVISED JULY 2022

www.ti.com

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