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DVR21 数据表(PDF) 190 Page - Microchip Technology |
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DVR21 数据表(HTML) 190 Page - Microchip Technology |
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190 / 416 page ![]() PIC24FJ256GA705 FAMILY DS30010118D-page 190 2016-2018 Microchip Technology Inc. REGISTER 16-1: CCPxCON1L: CCPx CONTROL 1 LOW REGISTERS R/W-0 U-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 CCPON — CCPSIDL CCPSLP TMRSYNC CLKSEL2 CLKSEL1 CLKSEL0 bit 15 bit 8 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 TMRPS1 TMRPS0 T32 CCSEL MOD3 MOD2 MOD1 MOD0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15 CCPON: CCPx Module Enable bit 1 = Module is enabled with an operating mode specified by the MOD<3:0> control bits 0 = Module is disabled bit 14 Unimplemented: Read as ‘0’ bit 13 CCPSIDL: CCPx Stop in Idle Mode Bit 1 = Discontinues module operation when device enters Idle mode 0 = Continues module operation in Idle mode bit 12 CCPSLP: CCPx Sleep Mode Enable bit 1 = Module continues to operate in Sleep modes 0 = Module does not operate in Sleep modes bit 11 TMRSYNC: Time Base Clock Synchronization bit 1 = Module time base clock is synchronized to the internal system clocks; timing restrictions apply 0 = Module time base clock is not synchronized to the internal system clocks bit 10-8 CLKSEL<2:0>: CCPx Time Base Clock Select bits 111 = TCKIA pin 110 = TCKIB pin 101 = PLL clock 100 = 2x peripheral clock 010 = SOSC clock 001 = Reference clock output 000 = System clock For MCCP1: 011 = CLC1 output For MCCP2: 011 = CLC2 output bit 7-6 TMRPS<1:0>: Time Base Prescale Select bits 11 = 1:64 Prescaler 10 = 1:16 Prescaler 01 = 1:4 Prescaler 00 = 1:1 Prescaler bit 5 T32: 32-Bit Time Base Select bit 1 = Uses 32-bit time base for timer, single edge output compare or input capture function 0 = Uses 16-bit time base for timer, single edge output compare or input capture function bit 4 CCSEL: Capture/Compare Mode Select bit 1 = Input capture peripheral 0 = Output compare/PWM/timer peripheral (exact function is selected by the MOD<3:0> bits) Note 1: Center-Aligned PWM mode is only available on MCCP modules. This feature is disabled on SCCP modules. |
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