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DVR21 数据表(PDF) 256 Page - Microchip Technology |
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DVR21 数据表(HTML) 256 Page - Microchip Technology |
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256 / 416 page  PIC24FJ256GA705 FAMILY DS30010118D-page 256 2016-2018 Microchip Technology Inc. REGISTER 21-3: RTCCON2L: RTCC CONTROL REGISTER 2 (LOW) R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0 U-0 FDIV4 FDIV3 FDIV2 FDIV1 FDIV0 — — — bit 15 bit 8 R/W-0 R/W-0 R/W-0 R/W-0 U-0 U-0 R/W-0 R/W-0 PWCPS1 PWCPS0 PS1 PS0 — — CLKSEL1 CLKSEL0 bit 7 bit 0 Legend: R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’ -n = Value at POR ‘1’ = Bit is set ‘0’ = Bit is cleared x = Bit is unknown bit 15-11 FDIV<4:0>: Fractional Clock Divide bits 00000 = No fractional clock division 00001 = Increase period by 1 RTCC input clock cycle every 16 seconds 00010 = Increase period by 2 RTCC input clock cycles every 16 seconds • • • 11101 = Increase period by 30 RTCC input clock cycles every 16 seconds 11111 = Increase period by 31 RTCC input clock cycles every 16 seconds bit 10-8 Unimplemented: Read as ‘0’ bit 7-6 PWCPS<1:0>: Power Control Prescale Select bits 00 = 1:1 01 = 1:16 10 = 1:64 11 = 1:256 bit 5-4 PS<1:0>: Prescale Select bits 00 = 1:1 01 = 1:16 10 = 1:64 11 = 1:256 bit 3-2 Unimplemented: Read as ‘0’ bit 1-0 CLKSEL<1:0>: Clock Select bits 00 = SOSC 01 = LPRC 10 = PWRLCLK pin 11 = System clock |
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