DVR21 datasheet(136/416 Pages) MICROCHIP

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PIC24FJ256GA705 FAMILY

DS30010118D-page 136

 2016-2018 Microchip Technology Inc.

11.5

Peripheral Pin Select (PPS)

A major challenge in general purpose devices is provid-

ing the largest possible set of peripheral features while

minimizing the conflict of features on I/O pins. In an

application that needs to use more than one peripheral

multiplexed on a single pin, inconvenient work arounds

in application code, or a complete redesign, may be the

only option.

The Peripheral Pin Select (PPS) feature provides an

alternative to these choices by enabling the user’s

peripheral set selection and its placement on a wide

range of I/O pins. By increasing the pinout options

available on a particular device, users can better tailor

the microcontroller to their entire application, rather

than trimming the application to fit the device.

The Peripheral Pin Select feature operates over a fixed

subset of digital I/O pins. Users may independently

map the input and/or output of any one of many digital

peripherals to any one of these I/O pins. PPS is per-

formed in software and generally does not require the

device to be reprogrammed. Hardware safeguards are

included that prevent accidental or spurious changes to

the peripheral mapping once it has been established.

11.5.1

AVAILABLE PINS

The PPS feature is used with a range of up to 44 pins,

depending on the particular device and its pin count.

Pins that support the Peripheral Pin Select feature

include the designation, “RPn” or “RPIn”, in their full pin

designation, where “n” is the remappable pin number.

“RP” is used to designate pins that support both remap-

pable input and output functions, while “RPI” indicates

pins that support remappable input functions only.

PIC24FJ256GA705 family devices support a larger

number of remappable input/output pins than remap-

pable input only pins. In this device family, there are up

to 33 remappable input/output pins, depending on the

pin count of the particular device selected. These pins

are numbered, RP0 through RP28 and RPI29 through

RPI32.

See Table 1-1 for a summary of pinout options in each

package offering.

11.5.2

AVAILABLE PERIPHERALS

The peripherals managed by the PPS are all digital

only peripherals. These include general serial commu-

nications (UART and SPI), general purpose timer clock

inputs, timer related peripherals (input capture and out-

put compare) and external interrupt inputs. Also

included are the outputs of the comparator module,

since these are discrete digital signals.

PPS is not available for these peripherals:

•I2C (input and output)

• Input Change Notifications

• EPMP Signals (input and output)

• Analog (inputs and outputs)

•INT0

A key difference between pin select and non-pin select

peripherals is that pin select peripherals are not asso-

ciated with a default I/O pin. The peripheral must

always be assigned to a specific I/O pin before it can be

used. In contrast, non-pin select peripherals are always

available on a default pin, assuming that the peripheral

is active and not conflicting with another peripheral.

11.5.2.1

Peripheral Pin Select Function

Priority

Pin-selectable peripheral outputs (e.g., output com-

pare, UART transmit) will take priority over general

purpose digital functions on a pin, such as EPMP and

port I/O. Specialized digital outputs will take priority

over PPS outputs on the same pin. The pin diagrams

list peripheral outputs in the order of priority. Refer to

them for priority concerns on a particular pin.

Unlike PIC24F devices with fixed peripherals, pin-

selectable peripheral inputs will never take ownership

of a pin. The pin’s output buffer will be controlled by the

TRISx setting or by a fixed peripheral on the pin. If the

pin is configured in Digital mode, then the PPS input will

operate correctly. If an analog function is enabled on

the pin, the PPS input will be disabled.

11.5.3

CONTROLLING PERIPHERAL PIN

SELECT

PPS features are controlled through two sets of Special

Function Registers (SFRs): one to map peripheral

inputs and one to map outputs. Because they are

separately controlled, a particular peripheral’s input

and output (if the peripheral has both) can be placed on

any selectable function pin without constraint.

The association of a peripheral to a peripheral-selectable

pin is handled in two different ways, depending on if an

input or an output is being mapped.

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