| 数据搜索系统,热门电子元器件搜索 |
|
H5AN4G6NAFR-RDC 数据表(PDF) 4 Page - Hynix Semiconductor |
|
|
|||||||||||||||||||||||||||||
H5AN4G6NAFR-RDC 数据表(HTML) 4 Page - Hynix Semiconductor |
|
4 / 45 page ![]() Rev. 1.3 / Mar.2016 4 ORDERING INFORMATION * xx means Speed Bin Grade OPERATING FREQUENCY *SK hynix DRAM devices support optional downbinning to CL17, CL15, CL13 and CL11. SPD setting is programmed to match. Part No. Configuration Package H5AN4G4NAFR-*xxc 1G x 4 78ball FBGA H5AN4G8NAFR-*xxC 512M x 8 H5AN4G6NAFR-*xxC 256M x 16 96ball FBGA MT/s Grade tCK (ns) CAS Latency (tCK) tRCD (ns) tRP (ns) tRAS (ns) tRC (ns) CL-tRCD-tRP DDR4-1600 -PB 1.25 11 13.75 (13.50)* 13.75 (13.50)* 35 48.75 (48.50)* 11-11-11 DDR4-1866 -RD 1.071 13 13.92 (13.50)* 13.92 (13.50)* 34 47.92 (47.50)* 13-13-13 DDR4-2133 -TF 0.937 15 14.06 (13.50)* 14.06 (13.50)* 33 47.06 (46.50)* 15-15-15 DDR4-2400 -UH 0.833 17 14.16 (13.75)* 14.16 (13.75)* 32 46.16 (45.75)* 17-17-17 DDR4-2666 -VK 0.75 19 14.25 (13.75)* 14.25 (13.75)* 32 46.25 (45.75)* 19-19-19 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |