F21 datasheet(186/416 Pages) MICROCHIP

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PIC24FJ256GA705 FAMILY

DS30010118D-page 186

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FIGURE 16-4:

32-BIT TIMER MODE

16.3

Output Compare Mode

Output Compare mode compares the Timer register

value with the value of one or two Compare registers,

depending on its mode of operation. The Output

Compare x module, on compare match events, has the

ability to generate a single output transition or a train of

output pulses. Like most PIC® MCU peripherals, the

Output Compare x module can also generate interrupts

on a compare match event.

Table 16-2 shows the various modes available in

Output Compare modes.

TABLE 16-2:

OUTPUT COMPARE/PWM MODES

CCPxTMRL

CCPxPRL

Comparator

Set CCTxIF

CCPxTMRH

CCPxPRH

Clock

Sources

Sync/

Trigger

Control

SYNC<4:0>

Time Base

Generator

MOD<3:0>

(CCPxCON1L<3:0>)

T32

(CCPxCON1L<5>)

Operating Mode

0001

Output High on Compare (16-bit)

Single Edge Mode

0001

Output High on Compare (32-bit)

0010

Output Low on Compare (16-bit)

0010

Output Low on Compare (32-bit)

0011

Output Toggle on Compare (16-bit)

0011

Output Toggle on Compare (32-bit)

0100

Dual Edge Compare (16-bit)

Dual Edge Mode

0101

Dual Edge Compare (16-bit buffered)

PWM Mode

0110

Center-Aligned Pulse (16-bit buffered)(1)

Center PWM Mode

0111

Variable Frequency Pulse (16-bit)

1111

External Input Source Mode (16-bit)

Note 1:

Center-Aligned PWM mode is only available on MCCP modules. This feature is disabled on SCCP modules.

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