CC1070-RTR1 datasheet(36/57 Pages) TI

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CC1070

SWRS043

Page 36 of 58

18 Built-in Test Pattern Generator

The

CC1070 has a built-in test pattern

generator that generates a PN9 pseudo

random sequence. The PN9_ENABLE bit

in the MODEM register enables the PN9

generator. A transition on the DI pin is

required after enabling the PN9 pseudo

random sequence.

The PN9 pseudo random sequence is

defined by the polynomial x

9 + x5 + 1.

The PN9 generator can be used for

transmission of ‘real-life’ data when

measuring narrowband ACP (Adjacent

Channel Power), modulation bandwidth or

occupied bandwidth.

19 Interrupt upon PLL Lock

In synchronous mode the DCLK pin on

CC1070 can be used to give an interrupt

signal to wake the microcontroller when

the PLL is locked.

PD_MODE[1:0] in the MAIN register

should be set to 01. If DCLK_LOCK in the

INTERFACE register is set to 1 the DCLK

signal is always logic high if the PLL is not

in lock. When the PLL locks to the desired

frequency the DCLK signal changes to

logic 0. When this interrupt has been

detected write PD_MODE[1:0] = 00. This

will enable the DCLK signal.

This function can be used to wait for the

PLL to be locked before the PA is ramped

up.

20 PA_EN Digital Output Pin

20.1 Interfacing an External PA

CC1070 has a digital output pin, PA_EN,

which can be used to control an external

PA. The functionality of this pin is

controlled

through

the

INTERFACE

general digital output control signal.

EXT_PA_POL controls the active polarity

of the signal.

EXT_PA controls the function of the pin. If

EXT_PA = 1, then the PA_EN pin will be

activated when the internal PA is turned

on. Otherwise, the EXT_PA_POL bit

controls the PA_EN pin directly.

This pin can therefore also be used as a

general control signal, see section 20.2.

20.2 General Purpose Output Control Pins

The digital output pin, PA_EN, can be

used as a general control signal by setting

EXT_PA = 0. The output value is then set

directly

the

value

written

EXT_PA_POL.

The LOCK pin can also be used as a

general-purpose output pin. The LOCK pin

is controlled by LOCK_SELECT[3:0] in the

LOCK register. The LOCK pin is low when

LOCK_SELECT[3:0] = 0000, and high

when LOCK_SELECT[3:0] = 0001.

These features can be used to save I/O

pins on the microcontroller when the other

functions associated with these pins are

not used.

CC1070-RTR1 数据表(PDF) 36 Page - Texas Instruments

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