Multiplier and Zero Delay Buffer

MDS 570 I

3

Revision 030905

Integrated Circuit Systems, Inc.

ICS570

External Components

The ICS570 requires a 0.01µF decoupling capacitor to be connected between VDD and GND. It must be

connected close to the part to minimize lead inductance. No external power supply filtering is required for

this device. A 33

Ω series terminating resistor can be used next to each output pin.

Recommended Circuit

Using CLK as the feedback will always result in synchronized rising edges between ICLK and CLK.

However, the CLK/2 could be a falling edge compared with ICLK. ICS recommends using CLK/2 feedback

whenever possible. This will synchronize the rising edges of all three clocks.

CLK

CLK/2

FBIN

S1

VDD

GND

Input

S0

ICLK

x2 Mode (S1, S0 = 1, 1)

CLK Feedback

CLK

CLK/2

ICLK

x2 Mode (S1, S0 = 1, 0)

CLK/2 Feedback

CLK

CLK/2