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L6364 数据表(PDF) 45 Page - STMicroelectronics |
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L6364 数据表(HTML) 45 Page - STMicroelectronics |
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45 / 60 page ![]() Register name Register address BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0 LINK2(2) 0x0F N/A N/A Data buffer fill count(3). Writing '1' declines sending response Writing '1' sends IO- Link response after FR0 is written FR0 to FR14 0x10 to 0x1E R/W R/W R/W R/W R/W R/W R/W R/W DATA [7] DATA [6] DATA [5] DATA [4] DATA [3] DATA [2] DATA [1] DATA [0] The data buffer registers are only accessible when frame data is available (DAT bit set).The initial value of all register bits following reset is '0', except bits DCDC:VSET[2:0], where the default value is 5. 1. Valid CNT data may only be read when data is available (DAT bit set). If this is true, then reading the field returns the number received octets. Writing the CNT field sets the number of octets to transmit. Note that a read back will continue to read the number of octets in the received frame, and not the value written over SPI. 2. LINK register repeated prior to frame buffer with deferred send function 3. Valid CNT data may only be read when data is available (DAT bit set). If this is true, then reading the field returns the number received octets. Writing the CNT field sets the number of octets to transmit. Note that a read back will continue to read the number of octets in the received frame, and not the value written over SPI. L6364 Register Map DS13363 - Rev 4 page 45/60 |
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