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L99ASC03G 数据表(PDF) 53 Page - STMicroelectronics

部件名 L99ASC03G
功能描述  Brushless / sensorless 3-phase motor pre-driver for automotive applications
PDF  70 Pages
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制造商  STMICROELECTRONICS [STMicroelectronics]
网页  http://www.st.com
标志 STMICROELECTRONICS - STMicroelectronics

L99ASC03G 数据表(HTML) 53 Page - STMicroelectronics

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L99ASC03G
ST-SPI Protocol
69
4.4.1
SPI Control Registers
Global status byte
Type:
R
15
14
13
12
11
10
9
8
GSBN
RSTB
SPIE
Reserved
FE
DE
GW
FS
Bit Bit description
[15] GSBN: GlobaleStatusByte Not
The GSBN bit is a logically NOR combination of Bit 8 to Bit 14. This bit can also be used as
Global Status Flag
without starting a complete communication frame, as it is present at SDO
immediately after pulling CSN low.
[14] RSTB: Reset Bit
The RSTB bit indicates a device POR. In case this bit is set, all internal Control Registers are
set to default and kept in that state until the bit is cleared. It is automatically cleared by any valid
SPI communication.
[13] SPIE: SPI Error
The SPIE bit is a logical OR combination of errors related to a wrong SPI communication
(wrong SCK count, CSN time-out and SDI stuck at errors). The SPIE is automatically cleared by
a valid SPI communication.
[12] Reserved
[11] FE: Functional Error
The FE bit is a logical OR combination of errors caused by specific events. Functional errors
turn into sink mode all or specific gate driver blocks.
[10] DE: Device Error
The DE bit is a logical OR combination of errors related to device specific blocks. Device Errors
lead to the turn-off of specific functional blocks.
[9] GW: Global Warning
The GW bit is a logical OR combination of warning flags implemented in the device. Warning do
not have any effects at all on the device.
[8] FS: Fail Safe
The FS bit is a logical OR combination of errors caused by specific events. Fail-safe Errors lead
to the turn-off of specific functional blocks. All Device Control Registers are set to their default
values, except Device Control Register 1 and DSFT_DIS bit.



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