Electrical specifications

VNH7100BAS

18/39

DocID029596 Rev 2

Note:

Other logic combinations on digital input pins not reported on the above table don’t allow to detect a

latched off channel.

Table 11. Operative condition - truth table

Pin status

HSDs and LDSs Status

INA

INB SEL0 PWM

CS

HSDA

LSDA HSDB LSDB

11

1

x

Current Monitoring HSDA

On

Off

On

Off

0

Current Monitoring HSDB

10

1

1

Current Monitoring HSDA

On

Off

Off

On

0On

Off

Off

Off

10

0

1

Hi-Z

On

Off

Off

On

0On

Off

Off

Off

01

1

1

Hi-Z

Off

On

On

Off

0

Off

Off

On

Off

01

0

1

Current Monitoring HSDB

Off

On

On

Off

0

Off

Off

On

Off

00

1

1

Hi-Z

Off

On

Off

On

0

00

1

0x(1)

1. Refer to Table 13: Off-state - truth table

Off

Off

Off

Off

0(2)

2. For INA =INB=SEL0 = PWM = 0, the device enters in standby after tD_STBY

Off

Off

Off

Off

Table 12. On-state fault conditions - truth table

Digital Input pins

CS

Comment

INA

INB

PWM SEL0

0

0

1

0

VsenseH

LSB protection triggered; LSB latched off

0

0

1

1

VsenseH

LSA protection triggered; LSA latched off

0

1

X

0

VsenseH

HSB protection triggered; HSB latched off

0

1

1

1

VsenseH

LSA protection triggered; LSA latched off

1

0

1

0

VsenseH

LSB protection triggered; LSB latched off

1

0

X

1

VsenseH

HSA protection triggered; HSA latched off

1

1

X

0

VsenseH

HSB protection triggered; HSB latched off

1

1

X

1

VsenseH

HSA protection triggered; HSA latched off