PM8805 datasheet(21/48 Pages) STMICROELECTRONICS

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DS12813 Rev 2

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PM8805

PM8805 overview

The new 4-pair PoE standard defines two extra PD and PSE types. Type3 identifies a PSE

delivering up to 60 W, and Type4 a PSE up to 99.9 W over 4-pair. The same types are

defined for single-signature PDs, where the allocated power depends on the assigned class,

which is the result of the Multiple-Event Classification, summarized in Table 7.

The assigned class may be different from the requested class for two reasons: the PSE

Type is lower than the PD Type, or the PSE doesn't have enough power to allocate the PD

request.

Anyway, if the PSE cannot afford the PD full power, it only issues a number of Class Events

compatible with the maximum available power, and the PD has to comply with that.

To do that, the PM8805 provides the system with the indication of the number of Class

Events detected through the T0, T1, T2 outputs. See Section 4.12 for more details.

The PM8805 is capable of covering all Single-Signature PD Types and Classes. As a

Type1-2 PD, the PM8805 presents a class 0-4 current within the classification range of 14.5

V to 20.5 V using the CLS1 pin during the first two Class Events. From the 3rd Class Event

onwards, the CLS2 pin is activated, so it is possible to set the new classes defined for Type

3 and 4 PDs.

The detailed behavior of the controller during classification is depicted in Figure 5:

Above the mark range, with voltage rising above Von_class for the first time, the CLS1

buffer is turned on with a Td_cls delay (3.3 ms typ). Then a Tcls_typ3 timer (81 ms typ)

starts, in order to detect the length of the first Class Event. The CLS1 buffer stays on until

the input voltage falls below the mark threshold Vmark_th or rises above Voff_class.

When the voltage falls to mark range, the internal timer is stopped and stored, and a Class

Event counter is increased. If the Tcls_typ3 time has expired, the first long Class Event is

acknowledged, identifying that PSE is Type3 or Type4, thus allowing the PM8805 to set the

MPS timings accordingly. See 4.13 for more details on MPS.

When the input voltage re-enters the class range after staying into mark, the CLS1 behavior

is the same as before, while the timer is not used anymore.

After the third transition into the mark range, entering into class, the CLS2 buffer is turned

on instead of CLS1, as always after Td_cls.

The behavior in the following Mark and Class Events is always the same as the third one,

regardless of the number of pulses provided by the PSE.

Both CLS1 and CLS2 are turned off if the input voltage exceeds Voff_Class (23 V typ.).

The Classification ends when the PD voltage rises above Vuvlo_rising, or falls below the

reset threshold (Vrst_cls). In the first case the number of Class Events stored in the counter

determines the values of the T0, T1, T2 outputs, as described in Table 13 PM8805 Type

Signals description table.

PM8805 数据表(PDF) 21 Page - STMicroelectronics

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