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STELPD01APUR 数据表(PDF) 3 Page - STMicroelectronics |
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STELPD01APUR 数据表(HTML) 3 Page - STMicroelectronics |
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3 / 27 page ![]() 2 Pin configuration Figure 2. Pin connection (top view) VG NC VIN GND dV/dt EN/Fault 1 3 2 4 5 VIN VOUT VOUT 6 7 8 9 10 ILIM Exp Table 1. Pin description Pin n° Symbol Function 1-2 VIN Positive input voltage. 3-4 VOUT Connected to the source of the internal power MOSFET. 5 NC Not connected. 6 GND Ground. 7 dV/dt Soft-start adjustment pin. The internal dV/dt circuit controls the slew rate of the output voltage at turn-on. The internal capacitor allows a fixed ramp-up time but an external capacitor can be added to this pin to increase the ramp time. If an additional capacitor is not required, this pin should be left open. 8 EN/Fault The EN/Fault pin is a tri-state, bi-directional interface. During normal operation the pin can be left floating, it is internally pulled up to 5 V. It can be used to disable the output of the device by pulling it to ground using an open drain or open collector device. See Section 6.1 , Section 6.5 , Section 6.6 and Section 6.7 for other specific functions of this pin according to the device versions. 9 ILIM (1) An RLIM resistor between this pin and the VOUT pin sets the overload current limit threshold. 10 VG External gate driver pin. An external power MOSFET can be connected to implement the reverse current protection. Exp The device’s package uses the center pad as a thermal conduit. This pad should be connected to an adequate spread of copper. GND connection is suggested. 1. Important: missing or shorted RLIM causes current limit circuit malfunction and may lead to device damage. STELPD01 Pin configuration DS13254 - Rev 1 page 3/27 |
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