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LDS3985 数据表(PDF) 3 Page - STMicroelectronics |
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LDS3985 数据表(HTML) 3 Page - STMicroelectronics |
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3 / 13 page ![]() LDS3985 SERIES 3/13 Figure 2: Connection Diagram (top view for SOT, top through view for DFN6) Table 4: Pin Description Figure 3: Typical Application Circuit Pin N° SOT23-5L Pin N° DFN6 Symbol Name and Function 11 VI Input Voltage of the LDO 2 5 GND Common Ground 36 VINH Inhibit Input Voltage: ON MODE when VINH ≥ 1.2V, OFF MODE when VINH ≤ 0.4V (Do not leave floating, not internally pulled down/up) 4 4 BYPASS Bypass Pin: Connect an external capacitor (usually 10nF) to minimize noise voltage 53 VO Output Voltage of the LDO - 2 N.C. Not Connect. SOT23-5L DFN6 |
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