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M61545AFP 数据表(PDF) 4 Page - Renesas Technology Corp

部件名 M61545AFP
功能描述  Serial Data Control Dual Electronic Volume
PDF  12 Pages
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制造商  RENESAS [Renesas Technology Corp]
网页  http://www.renesas.com
标志 RENESAS - Renesas Technology Corp

M61545AFP 数据表(HTML) 4 Page - Renesas Technology Corp

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M61545AFP
Preliminary
Rev.2.0 Dec 21, 2005 page 4 of 11
Electrical Characteristics
(Vcc = 5.0V, Ta = 25°C, unless stated otherwise)
Limits
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
Circuit current
ICC
NA
10
mA
Maximum attenuation
ATT
–90
–80
dB
ATT = –
Attenuation error
ΔATT
–2.0
0
2.0
dB
ATT = 0dB
Maximum input voltage
VIM
2.0
Vrms
THD = 1%, ATT = –6dB
Maximum output voltage
VOM
0.5
1.1
Vrms
THD = 1%, ATT = 0dB
VNO1
1.5
5.0
µVrms
ATT = 0dB, Rg = 0, JIS-A
Output noise voltage
VNO2
5.0
12.0
µVrms
ATT = –
∞, Rg = 0, JIS-A
Total harmonic distortion
THD
0.01
0.05
%
F = 1kHz, Vo = 0.1Vrms, ATT = 0dB
Channel separation
CS
–80
–70
dB
F = 1kHz, JIS-A, ATT = 0dB
DC Characteristics of Digital Block
Limits
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions
“L” level input voltage
VIL
0
0.6
V
“H” level input voltage
VIH
2.2
V
Data, clock pin
“L” level input current
IIL
–10
10
µA
VI = 0,
“H” level input current
IIH
10
µA
VI = 5V,
Data, clock pin
AC Characteristics of Digital Block
Limits
Parameter
Symbol
Min
Typ
Max
Unit
CLOCK cycle time
tcr
4
CLOCK pulse width (“H” level)
tWHC
1.6
CLOCK pulse width (“L” level)
tWLC
1.6
CLOCK rise time
tr
0.4
CLOCK fall time
tf
0.4
DATA setup time
tSD
0.8
DATA hold time
tHD
0.8
µsec
Clock and Data Timings (Recommended Conditions)
tcr
tf
tWLC
tWHC
25%
75%
75%
tr
DATA
CLOCK
tSD
tHD



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