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STA518ATR 数据表(PDF) 7 Page - STMicroelectronics |
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STA518ATR 数据表(HTML) 7 Page - STMicroelectronics |
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7 / 14 page ![]() Obsolete Product(s) - Obsolete Product(s) Obsolete Product(s) - Obsolete Product(s) 7/14 STA518A 3 TECHNICAL INFO: The STA518A is a dual channel H-Bridge that is able to deliver 50W per channel (@ THD=10% RL = 8Ω, VCC = 29V) of audio output power in high efficiency. The STA518A converts both DDX and binary-controlled PWM signals into audio power at the load. It includes a logic interface , integrated bridge drivers, high efficiency MOSFET outputs and thermal and short circuit pro- tection circuitry. In DDX mode, two logic level signals per channel are used to control high-speed MOSFET switches to connect the speaker load to the input supply or to ground in a Bridge configuration, according to the damped ternary Modulation operation. In Binary Mode operation , both Full Bridge and Half Bridge Modes are supported. The STA518A includes over- current and thermal protection as well as an under-voltage Lockout with automatic recovery. A thermal warning status is also provided. Figure 7. STA518A Block Diagram Full-Bridge DDX® or Binary Modes Figure 8. STA518A Block Diagram Binary Half-Bridge Mode 3.1 Logic Interface and Decode: The STA518A power outputs are controlled using one or two logic level timing signals. In order to provide a prop- er logic interface, the Vbias input must operate at the dame voltage as the DDX control logic supply. 3.2 Protection Circuitry: The STA518A includes protection circuitry for over-current and thermal overload conditions. A thermal warning pin (pin.28) is activated low (open drain MOSFET) when the IC temperature exceeds 130°C, in advance of the thermal shutdown protection. When a fault condition is detected , an internal fault signal acts to immediately disable the output power MOSFETs, placing both H-Bridges in high impedance state. At the same time an open- drain MOSFET connected to the fault pin (pin.27) is switched on. There are two possible modes subsequent to activating a fault: Logic I/F and Decode Left H-Bridge Protection Circuitry INL[1:2] INR[1:2] PWRDN OUTPL FAULT VL TRI-STATE OUTNL OUTPR OUTNR TWARN Regulators Right H-Bridge Logic I/F and Decode LeftA ‰-Bridge Protection Circuitry INL[1:2] INR[1:2] PWRDN OUTPL FAULT VL TRI-STATE OUTNL OUTPR OUTNR TWARN Regulators RightA ‰-Bridge LeftB ‰-Bridge RightB ‰-Bridge |
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