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STPM32 数据表(PDF) 71 Page - STMicroelectronics |
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STPM32 数据表(HTML) 71 Page - STMicroelectronics |
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71 / 121 page ![]() DS10272 Rev 8 71/121 STPM32, STPM33, STPM34 Theory of operation 121 To receive data from register 04 the master should send the frame: FF_FF_FF_FF To write lower (least significant) 16-bits in row 3 with data #AABB and read back from the same row: 06_06_BB_AA And then FF_FF_FF_FF To receive The sent frame changes according to LSBfirst setting: MISO line is valid as well. In this case, there is a full-reverse data transmission when LSBfirst=1, since data bit reception order changes as shown in Table 27. LSBfirst can be programmed using the transactions (other configuration bits involved in the transaction are set to their default states): The transaction to write LSBfirst = 0 is byte-reversed, since the system has moved from the LSBfirst = 1 condition. The read address is set so to read in the following transaction the content of US_REG1. Table 26. LSBfirst example LSBfirst = 0 04_03_CD_AB LSBfirst = 1 20_C0_B3_D5 Table 27. LSBfirst and MISO line Byte[0] Byte[1] Byte[2] Byte[3] LSBfirst = 0 [7:0] [15:8] [23:16] [31:24] LSBfirst = 1 [0:7] [8:15] [16:23] [24:31] Table 28. LSBfirst programming LSBfirst = 1 24_24_07_CO LSBfirst = 0 24_24_EO_02 |
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