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LARA-R6801 数据表(PDF) 28 Page - u-blox AG |
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LARA-R6801 数据表(HTML) 28 Page - u-blox AG |
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28 / 41 page ![]() LARA-R6 series - Data sheet UBX-21004391 - R09 Electrical specifications Page 28 of 41 C1-Public 4.2.10 RESET_N pin Parameter Min. Typical Max. Unit Remarks Internal supply for RESET_N Input Signal 1.8 V Low-level input -0.30 0.63 V Pull-up resistance 37 k Internal active pull-up Input leakage current -0.20 0.20 µ A RESET_N low time 0.05 6 s Low time to trigger module reset (reboot) 10 s Low time to trigger module abrupt emergency switch off Table 23: RESET_N pin characteristics 4.2.11 SIM pins The SIM pins are a dedicated interface to the external SIM card/chip. The electrical characteristics fulfill the regulatory specification requirements. The values in Table 24 are for information only. Parameter Min. Typ. Max. Unit Remarks Low-level input -0.30 0.2*VSIM V High-level input 0.7*VSIM VSIM+0.3 V Low-level output 0 0.4 V Max value at IOL = +2.0 mA High-level output 0.8*VSIM VSIM V Max value at IOL = +2.0 mA Internal pull-up resistor on SIM_IO 4.7 k Internal pull-up to VSIM supply Input leakage current -2 2 µ A VIN =0 V or VIN =VSIM Clock frequency on SIM_CLK 4.8 MHz Table 24: SIM pins characteristics 4.2.12 USB pins USB data lines (USB_D+ / USB_D–) are compliant with the USB 2.0 high-speed specification. See the Universal Serial Bus specification revision 2.0 [14] for detailed electrical characteristics. The values in Table 25 related to USB 2.0 high-speed physical layer specifications are for information only. Parameter Min. Typical Max. Unit Remarks VUSB_DET pin, High-level input 1.50 5.00 5.25 V AT+UUSBDET=0 (factory-programmed setting) 4.40 5.00 5.25 V AT+UUSBDET=1 High-speed squelch detection threshold (input differential signal amplitude) 100 150 mV High speed disconnect detection threshold (input differential signal amplitude) 525 625 mV High-speed data signaling input common mode voltage range –50 500 mV High-speed idle output level –10 10 mV High-speed data signaling output high level 360 440 mV High-speed data signaling output low level –10 10 mV Chirp J level (output differential voltage) 700 1100 mV Chirp K level (output differential voltage) –900 –500 mV Table 25: USB pins characteristics |
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