8.3 Power Supply Recommendations

The DAC82001 operates within the specified VDD supply range of 2.7 V to 5.5 V. The DAC82001 does not

require specific supply sequencing, but VREF must be less than VDD, as noted in the Absolute Maximum Ratings.

The VDD supply must be well-regulated and low-noise. Switching power supplies and DC/DC converters often

have high-frequency glitches or spikes riding on the output voltage. Digital components also create similar

high-frequency spikes. This noise can easily couple into the DAC output voltage through various paths between

the power connections and analog output. To further minimize noise from the power supply, include a 1-μF to

10-μF capacitor and 0.1-μF bypass capacitor.

8.4 Layout

8.4.1 Layout Guidelines

A precision analog component requires careful layout. The following list provides some insight into good layout

practices.

• Bypass the VDD to ground with a low ESR ceramic bypass capacitor. The typical recommended bypass

capacitance is 0.1-µF to 0.22-µF ceramic capacitor, with a X7R or NP0 dielectric.

• Bypass VREF to ground with low ESR ceramic bypass capacitors.

• Place power supplies and REF bypass capacitors close to the pins to minimize inductance and optimize

performance.

• The output pin, VOUT, has relatively high impedance and is susceptible to high parasitic capacitance. Use

short and direct traces when routing VOUT.

8.4.2 Layout Example

1

2

3

4

10

9

8

7

VDD

GND

Decoupling

Capacitor

GND

VOUT

Reference

Bypass

Capacitor

SYNC

SCLK

Pull-Down

Resistor

Ground and Power Planes Omitted for Clarity

Pull-up

Resistor

VDD

5

6

SDIN

GND

GND

Pull-Down

Resistor

(for Zero

Scale Reset)

DAC82001

Figure 8-8. Layout Example

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DAC82001

SBASAK3A – SEPTEMBER 2022 – REVISED NOVEMBER 2022

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