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PCLT-2AT4 数据表(PDF) 12 Page - STMicroelectronics |
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PCLT-2AT4 数据表(HTML) 12 Page - STMicroelectronics |
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12 / 18 page ![]() 4 Input reverse polarity robustness PCLT-2A 12/18 4 Input reverse polarity robustness Each input of the PCLT circuit may be biased to a reverse polarity equal to - VCC. This case corresponds to a connection mistake or a reverse biasing that is generated by the demagnetization of a monitored inductive solenoid. The involved input withstands the high reverse current up to 20 mA; its opto-coupler is OFF and is protected by the conducting input diode. The input remains operational, and some extra dissipation should be take place in their clamping protections. Figure 12. Current sharing in the PCLT device when IN2 is biased at -30 V and IN1 at +30 V. Considering the supply operation, a reverse blocking diode can be connected between the module ground and the common pin COM to protect the PCLT device against any spurious reverse supply connection. Then, the whole module supply voltage rating is extended to ± 30 V. OPTO 1 OPTO 2 Ω 750 750 Ω I 1 = + 30V I 2 = -30V GND (0V) Vcc = + 30V COM OUT 1 OUT 2 I REG4 1N4007 V C PCLT-2 IN 2 IN 1 I REG N V CL= 38 V 2.2 k 750 Ω 750 I 1 I 2 =- 3.6mA 9.7mA 13.3mA COM OUT 1 OUT 2 I REG4 1N4007 V C PCLT-2 IN 2 IN 1 I REG N V CL= 38 V |
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