Copyright

 ANPEC Electronics Corp. Rev. A.

Rev.A.2 - Mar., 2002

APW7046

www.anpec.com.tw

5

Functional Pin Description (Cont.)

the SOURCE-SINK regulator. This pin drives the lower

external MOSFET as a sinking regulator.

FB (Pin 8)

Connect this pin to output of the SOURCE-SINK

regulator. This pin provides the voltage feedback path

for the sourcing and sinking regulators. This pin is in-

ternally connected to the negative input of the SOURCE

controller, and also connected to the positive input of

the SINK controller.

VIN (Pin 9)

Connect this pin to VMEM or a fixed voltage source.

Two voltages, about 0.5VIN, are generated by an inter-

nal resistor divider as the reference voltages of the sourc-

ing and sinking regulators. The sinking regulation volt-

age is higher than the sourcing one to prevent a direct

current path through the upper and lower MOSFETs.

OCSET1 (Pin 10)

Connect a resistor (R

the PWM1 converter’s MOSFET. R

200uA current source (I

resistance(r

trip point according to the following equation:

I

I

r

DS( ON)

An over-current trip cycles the soft-start function. The

voltage at this pin is monitored for Power-On Reset

(POR) purposes.

VSEN1 (Pin 11)

This pin is connected to the PWM1 converter’s output

voltage to provide the voltage feedback path. The over-

voltage protection(OVP) comparator uses this pin to

monitor the output voltage for over- voltage protection

GND (Pin 12)

Signal ground for the IC. All voltage levels are mea-

sured with respect to this pin.

VSEN2 (Pin 13)

This pin is connected to the PWM2 converter’s output

voltage to provide the voltage feedback path. The over-

voltage protection(OVP) comparator uses this pin to

monitor the output voltage for over- voltage protection.

OCSET2 (Pin 14)

Connect a resistor (R

the PWM2 converter’s MOSFET. The function of this pin is

similar to OCSET1(pin 10) for OC detection and POR

purposes.

CORE0-2 (Pin 15-17)

CORE0-2 are TTL-compatible logic level input pins to

the 3-bit DAC. The states of the three pins set the

verter and also set the OVP threshold voltage for

PWM1 converter.

MEM0-2 (Pin 18-20)

MEM0-2 are TTL-compatible logic level input pins to

the other 3-bit DAC. The states of the three pins set

converter and also set the OVP threshold voltage for

PWM2 converter.

PGND (Pin 21)

Connect this pin to the anode of the flywheel diodes

of the two PWM converters.

PHASE2 (Pin 22)

Connect this pin to the PWM2 converter’s MOSFET

source.This pin is used to monitor the voltage drop

across the MOSFET for over-current protection.