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STCCP27A 数据表(PDF) 6 Page - STMicroelectronics |
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STCCP27A 数据表(HTML) 6 Page - STMicroelectronics |
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6 / 19 page ![]() Pin configuration STCCP27A 6/19 Table 2. Main function table Z = High Impedance, L = Low Voltage Level, H = High Voltage Level, X = Don’t care Table 3. I2C Bus function table Open: If I/OVDD is not driven then the I/OVL will go in high level VL by embedded 10kΩ pull-up resistor; If I/OVL is not driven then the I/OVCC will go in high level VDD by embedded 10KΩ pull-up resistor Input Output Function Enable SYNC_SEL D+ D- CLK+ CLK- V-SYNC H-SYNC D1-D8 CLK L X XX XX L L L L CCP disabled HH SOF (FFH 00H 00H 02H)H H See detailed timing diagram Start of frame H H EOF(FFH 00H 00H 03H) L L End of frame HH SOL(FFH 00H 00H 00H) No change H Start of line HH EOL(FFH 00H 00H 01H) No change L End of line H L XX XX L L D+, D- See detailed timing diagram Disabledsync (D1-D8 will get out data, including sync code) Enable I/O Input Function I/OVDD I/OVL XL L I2C Comm. XVDD VL I2C Comm. XOpen VL I2C Comm. XVDD Open I2C Comm. Figure 5. Frame structure In VGA case (allowed synchronization codes sequence) |
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