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FT930Q-R 数据表(PDF) 48 Page - Bridgetek Pte Ltd. |
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FT930Q-R 数据表(HTML) 48 Page - Bridgetek Pte Ltd. |
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48 / 65 page ![]() Copyright © Bridgetek Pte Ltd 48 FT93x Datasheet Embedded Microcontroller Datasheet Version 1.5 Document Reference No.: BRT_000051 Clearance No.: BRT#049 Figure 5-3 Definition of I2C Timing HS mode SPI Master I/O pins dynamic characteristics (Vcc (I/O) = 3.3V) Parameter Description Vcc (I/O) 3.3V Unit Minimum Typical Maximum TSCLK SPI clock period 25 ns TSCLKL SPI clock low duration 19 ns TSCLKH SPI clock high duration 19 ns TOD output data delay 19 20 ns Table 5-9 SPI I/O pins (SPIM_CLK/MOSI/MISO/SS0/SS1/SS2/SS3) characteristics Figure 5-4 Definition of SPI Master Timing Mode 0 |
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