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FT901L-R 数据表(PDF) 19 Page - Bridgetek Pte Ltd. |
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FT901L-R 数据表(HTML) 19 Page - Bridgetek Pte Ltd. |
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19 / 67 page ![]() Copyright © Bridgetek Pte Ltd 19 FT900 /1/2/3 Revision C Embedded Microcontroller Datasheet Version 1.0 Document No.: BRT_000172 Clearance No.: BRT#087 Pin No. Name Type Description 48 PWM1/GPIO57 I/O GPIO57 input/output. (By default is GPIO input, internal pull-low) PWM channel 1, output. A stereo 16/8-bit PCM audio data channel output. 49 PWM2/GPIO58 I/O GPIO58 input/output. (By default is GPIO input, internal pull-low) PWM channel 2, output. 50 I2S_SDAO/GPIO60 I/O GPIO60 input/output. (By default is GPIO input, internal pull-low) Serial data line output for I2S master or slave. 51 I2S_SDAI/GPIO61 I/O GPIO61 input/output. (By default is GPIO input, internal pull-low) Serial data line input for I2S master or slave. 52 I2S_BCLK/GPIO62 I/O GPIO62 input/output. (By default is GPIO input, internal pull-low) Bit clock line output for I2S master transmitter or input for I2S slave receiver. 53 I2S_LRCLK/GPIO63 I/O GPIO63 input/output. (By default is GPIO input, internal pull-low) Left / Right clock line output for I2S master transmitter or input for I2S slave receiver. 54 I2S_MCLK/GPIO64 I/O GPIO64 input/output. (By default is GPIO input, internal pull-low) I2S master transmitter clock output. 55 I2SM_CLK22/GPIO65 I/O GPIO65 input/output. (By default is GPIO input, internal pull-low) I2S master external 22.5792MHz clock input. 56 I2SM_CLK24/GPIO66 I/O GPIO66 input/output. (By default is GPIO input, internal pull-low) I2S master external 24.576MHz clock input. 57 VBUS_DISCHG/GPIO0 I/O GPIO0 input/output. (By default is GPIO input, internal pull-high) USB host VBUS discharge. 58 OC_N/GPIO1 I/O GPIO1 input/output. (By default is GPIO input, internal pull-high) USB host port over current status output. Active low. 59 PSW_N/GPIO2 I/O GPIO2 input/output. (By default is GPIO input, internal pull-high) USB host port external VBUS power switcher. Active low. 60 VBUS_DTC/GPIO3 I/O GPIO3 input/output. (By default is GPIO input, internal pull-low) USB device VBUS detection. 61 ENET_LED0/GPIO4 I/O GPIO4 input/output. (By default is GPIO input, internal pull-low) Ethernet activity indicator LED 0.[2] 62 ENET_LED1/GPIO5 I/O GPIO5 input/output. (By default is GPIO input, internal pull-low) Ethernet activity indicator LED 1.[2] 63 VOUT1 P +1.2V Regulator power output. This is internal regulator output. Connect 4.7uF and 0.1uF decoupling capacitors to GND. This pin must be connected to pins 32 and 67. |
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