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24LLC02A 数据表(PDF) 12 Page - Ceramate Technical |
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24LLC02A 数据表(HTML) 12 Page - Ceramate Technical |
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12 / 19 page ![]() 24LLC02 2K-Bits Serial EEPROM For Low Power * All specs and applications shown above subject to change without prior notice. 1F-5 NO.66 SEC.2 NAN-KAN RD ., LUCHU , TAOYUAN, TAIWAN Email: server@ceramate.com.tw Tel:886-3-3214525 Http: www.ceramate.com.tw Fax:886-3-3521052 Page 12 of 19 Rev 1.0 Dec. 26, 2001 RANDOM ADDRESS BYTE READ OPERATION Using random read operations, the master can access any memory location at any time. Before it issues the slave address with the R/W bit set to “1”, the master must first perform a “dummy” write operation. This operation is performed in the following steps: 1. The master first issues a Start condition, the slave address, and the word address to be read. (This step sets the internal word address pointer of the 24LLC02 to the desired address.) 2. When the master receives an ACK for the word address, it immediately re-issues a start condition followed by another slave address, with the R/W bit set to “1”. 3. The 24LLC02 then sends an ACK and the 8-bit data stored at the desired address. 4. At this point, the master does not acknowledge the transmission, but generates a stop condition instead. 5. In response, the 24LLC02 stops transmitting data and reverts to its stand-by mode (see Figure 1-13). Slave Address Word Address Start A C K A C K Slave Address A C K N O A C K Stop Start Data (n) Figure 1-13. Random Address Byte Read Operation |
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