AP64501

Document number: DS41980 Rev. 4 - 2

22 of 26

www.diodes.com

August 2019

© Diodes Incorporated

AP64501

Application Information (cont.)

16

External Loop Compensation Design (cont.)

AP64501

VIN

EN

SW

BST

FB

GND

INPUT

R1

115kΩ

C4

47pF

R2

22.1kΩ

L

3.6μH

C3

100nF

C2

3 x 22µF

C1

10µF

OUTPUT

VOUT

5V

COMP

R5

15.8kΩ

C5

2.7nF

C6

33pF

SS

Css

10nF

VIN

12V

Figure 28. Example Circuit with Calculated Component Values for Loop Compensation

The first-order calculated loop response has the following characteristics:



Bandwidth is around 13.8kHz



Phase Margin is around 101.1°



Gain Margin is around -23.9dB

Figure 29. Closed-Loop Bandwidth

Figure 30. Closed-Loop Phase Margin

-100

-80

-60

-40

-20

0

20

40

60

80

100

100

1,000

10,000

100,000 1,000,000

Frequency (Hz)

-250

-200

-150

-100

-50

0

50

100

150

200

250

100

1,000

10,000

100,000

1,000,000

Frequency (Hz)