©2012 Silicon Storage Technology, Inc.

DS25023B

06/13

13

1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash

SST39LF010 / SST39LF020 / SST39LF040

SST39VF010 / SST39VF020 / SST39VF040

Data Sheet

AC Characteristics

Table 12: Read Cycle Timing Parameters - VDD = 3.0-3.6V for SST39LF010/020/040 and

2.7-3.6V for SST39VF010/020/040

Symbol

Parameter

SST39LF010-55

SST39LF020-55

SST39LF040-55

SST39VF010-70

SST39VF020-70

SST39VF040-70

Units

Min

Max

Min

Max

TRC

Read Cycle Time

55

70

ns

TCE

Chip Enable Access Time

55

70

ns

TAA

Address Access Time

55

70

ns

TOE

Output Enable Access Time

30

35

ns

TCLZ1

1. This parameter is measured only for initial qualification and after a design or process change that could affect this

parameter.

CE# Low to Active Output

0

0

ns

TOLZ1

OE# Low to Active Output

0

0

ns

TCHZ1

CE# High to High-Z Output

15

25

ns

TOHZ1

OE# High to High-Z Output

15

25

ns

TOH1

Output Hold from Address Change

00

ns

T12.2 25023

Table 13: Program/Erase Cycle Timing Parameters

Symbol

Parameter

Min

Max

Units

TBP

Byte-Program Time

20

µs

TAS

Address Setup Time

0

ns

TAH

Address Hold Time

30

ns

TCS

WE# and CE# Setup Time

0

ns

TCH

WE# and CE# Hold Time

0

ns

TOES

OE# High Setup Time

0

ns

TOEH

OE# High Hold Time

10

ns

TCP

CE# Pulse Width

40

ns

TWP

WE# Pulse Width

40

ns

TWPH1

1. This parameter is measured only for initial qualification and after a design or process change that could affect this

parameter.

WE# Pulse Width High

30

ns

TCPH1

CE# Pulse Width High

30

ns

TDS

Data Setup Time

40

ns

TDH1

Data Hold Time

0

ns

TIDA1

Software ID Access and Exit Time

150

ns

TSE

Sector-Erase

25

ms

TSCE

Chip-Erase

100

ms

T13.1 25023