 |
数据搜索系统，热门电子元器件搜索 |
|
|
数据搜索系统，热门电子元器件搜索 |
|
DRA821U2...ALM 数据表(PDF) 3 Page - Texas Instruments |
|
|
|||||||||||||||||||||||||||||
DRA821U2...ALM 数据表(HTML) 3 Page - Texas Instruments |
|
|
3 / 252 page  Navigator Subsystem (E) Interconnect High-Speed Serial Interfaces Audio Peripherals 3x MCASP 10/100/1000 Ethernet (A) DRA821 1x PCIe 4-Lane Port (B) ® 512KB L2 with ECC 1MB Shared L2 Cache with ECC Dual Arm ® ® Cortex -A72 System Services (E) Spinlock GP Timers Mailboxes Debug UDMA WWDT Navigator Subsystem Channelized FW MCRC RA INTR UDMA INTA Proxy DMSC Safety DTK SP RAM 512B 10x GP Timers 2x RTI/WWDT SA2UL MCU Island 1 MB SRAM Channelized FW CPTS Mailbox TIMER-MGR PVU INTR SecProxy MCRC INTA UDMA Proxy/RA Spinlock Security Accelerators RNG DES AES SHA PKA 3DES Media and Data Storage 1x eMMC 1x SD/SDIO 1x USB 3.0 DRD (B) Automotive Interfaces 2x CAN-FD (A) Ethernet Switch (Up to 4-ports QSGMII/SGMII/RGMII/RMII/ XFI/USXGMII) (B) GPIO 2x Arm ® Cortex -R5F ® (with optional Lockstep) 18x CAN-FD (E) Control Interfaces 6x EPWM 3x CAP E 3x QEP E Memory Subsystem MSMC 1MB SRAM with ECC (E) EMIF 1x32 LPDDR4 w ECC ith (E) 512KB SRAM (E) ELM GPMC 2x Arm ® Cortex -R5F ® (E) (with optional Lockstep) 64K L2 RAM per Core (E) General Connectivity 2x GPIO (F) 3x MCSPI 8x I2C (F) 2x I2C (A) (A) 1x OSPI or 1x HyperBus (A)(C) 1x I3C (A) 1x I3C 8x MCSPI 1x UART (A) 11x UART (F) 1x ADC (A) (D) (D)(F) 2x WKUP GPIO A. Both WKUP and MCU domain instances are located on the MCU island but available for the full system to access. B. SGMII, USB3.0, and PCIE share total of four SerDes lanes. A maximum of two of the three IP (for example, SGMII and USB) can be used concurrently. C. Flash interface can be configured as OSPI0, or HyperBus. D. One port is internally connected only. Not connected to any pins. E. A solid black box indicates the IP is part of the Extended MCU (eMCU). F. A dashed black box indicates that some instances of the IP are present in the eMCU and some instances are present in the non-eMCU portion of the Main Domain. Figure 3-1. Functional Block Diagram www.ti.com DRA821U-Q1 SPRSP57D – APRIL 2020 – REVISED DECEMBER 2022 Copyright © 2022 Texas Instruments Incorporated Submit Document Feedback 3 Product Folder Links: DRA821U-Q1 |
|
链接网址 |
| ALLDATASHEET是否为您带来帮助? [ DONATE ] |
关于 Alldatasheet | 广告服务 | 联系我们 | 隐私政策 | 数据表链接 | 链接交换 | 制造商名单 All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
Chinese ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
