LT3154AVPBF datasheet(4/32 Pages) AD

4 / 32 page

LT3154

Rev. 0

For more information www.analog.com

ELECTRICAL CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings

may cause permanent damage to the device. Exposure to any Absolute

Maximum Rating condition for extended periods may affect device

reliability and lifetime.

Note 2: The LT3154 is tested under pulsed load conditions such

that TJ ≈TA. The LT3154E is guaranteed to meet specifications from

0°C to 85°C junction temperature. Specifications over the –40°C to

125°C operating junction temperature range are assured by design,

characterization and correlation with statistical process controls. The

LT3154I is guaranteed to meet specifications over the –40°C to 125°C

operating junction temperature. The LT3154J is guaranteed to meet

specifications over the –40°C to 150°C operating junction temperature

range. High junction temperatures degrade operating lifetimes; operating

lifetime is de‑rated for temperatures greater than 125°C.The maximum

ambient temperature is determined by specific operating conditions in

conjunction with board layout, the rated package thermal resistance

and other environmental factors. The junction temperature (TJ in °C) is

calculated from the ambient temperature (TA in °C) and power dissipation

(PD in Watts) according to the following formula:

TJ = TA + (PD) • (θJA °C/W)

Where θJA is the package thermal impedance. Note the maximum ambient

temperature consistent with these specifications is determined by specific

operating conditions in conjunction with board layout, the rated package

thermal resistance and other environmental factors.

Note 3: This IC includes overtemperature protection that is intended to

protect the device during momentary overload conditions. The maximum

rated junction temperature will be exceeded when this protection is active.

Continuous operation above the maximum operating junction temperature

may impair device reliability or permanently damage the device.

Note 4: Specification is guaranteed by design and not 100% tested

in production.

Note 5: Failure to solder exposed backside of the package to the PC Board

will result in a higher thermal resistance

Note 6: Voltage transients on the switch pins beyond the DC limits

specified in Absolute Maximum Ratings are non‑disruptive to normal

operation when using good layout practices as described elsewhere in the

data sheet and as seen on the demo board.

Note 7: To ensure low shutdown current when voltage is initially applied

to VIN, the external SS capacitor option is recommended if EN/UVLO is

controlled through a microprocessor and not connected to VIN directly

or through a UVLO resistor divider network as depicted in most data

sheet applications.

Alternately, toggling EN/UVLO high then low after initial VIN power‑up

will allow the LT3154 to determine the correct SS pin configuration to

enable or disable an internal 40k resistor used to discharge the external

SS capacitor in shutdown. If SS is connected to VIN (selecting the internal

option) and EN/UVLO is held low during initial VIN power‑up, the 40k

resistor may add extra VIN quiescent current until EN/UVLO is toggled.

LT3154AVPBF 数据表(PDF) 4 Page - Analog Devices

LT3154AVPBF 数据表(HTML) 4 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32

数据表下载