STW81102 datasheet(21/43 Pages) STMICROELECTRONICS

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STW81102

General description

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The SERCAL bit should be set to "1" at each division ratio change. It should be noted that in

order to reset the autocalibrator State Machine after a power-up, and anyway before the first

calibration, the INITCAL bit should be set to "1" and back to "0" (this operation is

automatically performed by the Power On Reset circuitry). The calibration takes

approximately 7 periods of the PFD Frequency.

The maximum allowed fPFD to perform the calibration process is 1 MHz. Using an higher

FPFD the following procedure should be adopted:

Calibrate the VCO at the desired frequency with an fPFD less than 1 MHz

Set the A, B and R dividers ratio for the desired fPFD

VCO Voltage Amplitude Control

The voltage swing of the VCOs can be adjusted over 4 levels by means of two dedicated

programming bits (PLL_A1 and PLL_A0). Higher amplitudes provide best phase noise while

lower ones save power.

The following table gives the voltage level expected on the resonator nodes, the current

consumption and the phase noise @1MHz.

Table 8.

VCO A performances vs. amplitude setting (Freq=3.3GHz)

PLL_A[1:0]

Differential

voltage swing (Vp)

Current

Consumption (mA)

PN @1MHz (dBc/Hz)

1.1

-125

1.3

-126

1.9

-128.5

2.1

-129

Table 9.

VCO B performances vs. amplitude setting (Freq=4.3GHz)

PLL_A[1:0]

Differential

voltage swing (Vp)

Current

Consumption (mA)

PN @1MHz (dBc/Hz)

1.1

-124

1.3

-125

1.9

-127.5

2.1

-128

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