NXP Semiconductors

FS8600_SDS

Fail-safe system basis chip with multiple SMPSs and LDOs

6 Internal block diagram

aaa-047805

OTP

V1P6D_FS

V1P6D_FS

Fail-safe state machine

ABIST

LBIST

Bias

Control

Power management

state machine

Watchdog

MCU failure

monitoring (FCCU)

External IC

monitoring

PGOOD

driver

Analog

MUX

FS86

Reset

driver

Fail-safe

output driver

Voltage

supervision

VMON0_I2C

IN(s)

VBOS

VMONx_DAC

VMON4_RINT

VMONy_RES

FCCU1

ERRMON

AMUX

VPRE

CONTROLLER

ILIM

FIN/Bias

BG1

PRE_COMP

PRE_FB

PRE_CSN

PRE_CSP

PRE_GLS

PRE_SW

PRE_BOOT

PRE_GHS

DBG

SDA

SCL

VMON0_I2C

WAKE2

WAKE1

LDO1

LDO1_IN

BAT_SW

INTB

XFAILB

FIN

FOUT

PGOOD

RSTB

FS0B

FCCU2

OSC

FS

OSC

MAIN

Power

synchronization

V1P6D_MAIN

V1P6A_MAIN

I2C

MAIN

Wake

VSUP

OTP

CLK_MGT

I2C_FS

VMON4

VMON5-9

VMON1-3

VMON0

BG2

LDO1

ILIM

TSD

BG1

LDO2

VBOOST

LDO2

ILIM

TSD

BG1

BOOST_LS

BOOST

VBOS

BOS

ILIM

TSD

BG1

BUCK

ILIM

TSD

BG1

BUCK_SW

BUCK_FB

BUCK_IN

EP

EP

EP

GND/GNDFS

VSUP1/2

DBG

Figure 2. Block diagram

FS8600_SDS

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Product short data sheet

Rev. 2.0 — 7 December 2022

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