Philips Semiconductors

Product specification

74ALVT16601

2.5V/3.3V 18-bit universal bus transceiver (3-State)

2

1998 Feb 13

853-1885 18958

FEATURES

resistors to hold unused inputs

and 200V per Machine Model

DESCRIPTION

The 74ALVT16601 is a high-performance BiCMOS product

up to 5V.

This device is an 18-bit universal transceiver featuring non-inverting

3-State bus compatible outputs in both send and receive directions.

Data flow in each direction is controlled by output enable (OEAB and

OEBA), latch enable (LEAB and LEBA), and clock (CPAB and

CPBA) inputs. For A-to-B data flow, the device operates in the

transparent mode when LEAB is High. When LEAB is Low, the A

data is latched if CPAB is held at a High or Low logic level. If LEAB

is Low, the A-bus data is stored in the latch/flip-flop on the

Low-to-High transition of CPAB. When OEAB is Low, the outputs are

active. When OEAB is High, the outputs are in the high-impedance

state. The clocks can be controlled with the clock-enable inputs

(CEBA/CEAB).

Data flow for B-to-A is similar to that of A-to-B but uses OEBA,

LEBA and CPBA.

Active bus-hold circuitry is provided to hold unused or floating data

inputs at a valid logic level.

QUICK REFERENCE DATA

SYMBOL

PARAMETER

CONDITIONS

TYPICAL

UNIT

SYMBOL

PARAMETER

2.5V

3.3V

UNIT

Propagation delay

An to Bn or Bn to An

1.9

2.5

1.5

1.9

ns

Input capacitance (Control pins)

4

4

pF

I/O pin capacitance

8

8

pF

Total supply current

Outputs disabled

40

60

µA

ORDERING INFORMATION

PACKAGES

TEMPERATURE RANGE

OUTSIDE NORTH AMERICA

NORTH AMERICA

DWG NUMBER

56-Pin Plastic SSOP Type III

–40

°C to +85°C

74ALVT16601 DL

AV16601 DL

SOT371-1

56-Pin Plastic TSSOP Type II

–40

°C to +85°C

74ALVT16601 DGG

AV16601 DGG

SOT364-1

PIN DESCRIPTION

PIN NUMBER

SYMBOL

NAME AND FUNCTION

1, 27

OEAB/OEBA

A-to-B/ B-to-A Output enable input

(active Low)

29, 56

CEBA/CEAB

B-to-A/A-to-B clock enable

2, 28

LEAB/LEBA

A-to-B/B-to-A Latch enable input

55,30

CPAB/CPBA

A-to-B/B-to-A Clock input (active rising edge)

3, 5, 6, 8, 9, 10, 12, 13, 14, 15,

16, 17, 19, 20, 21, 23, 24, 26

A0-A17

Data inputs/outputs (A side)

54, 52, 51, 49, 48, 47, 45, 44, 43,

42, 41, 40, 38, 37, 36, 34, 33, 31

B0-B17

Data inputs/outputs (B side)

4, 11, 18, 25, 32, 39, 46, 53

GND

Ground (0V)

7, 22, 35, 50

Positive supply voltage