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AM29DL640G 数据表(PDF) 39 Page - Advanced Micro Devices

部件名 AM29DL640G
功能描述  64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Read/Write Flash Memory
PDF  52 Pages
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制造商  AMD [Advanced Micro Devices]
网页  http://www.amd.com
标志 AMD - Advanced Micro Devices

AM29DL640G 数据表(HTML) 39 Page - Advanced Micro Devices

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June 7, 2002
Am29DL640G
39
PR E L I M I N A R Y
AC CHARACTERISTICS
Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the “Erase And Programming Performance” section for more information.
Parameter
Speed Options
JEDEC
Std
Description
65
70
90
120
Unit
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
65
70
90
120
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ASO
Address Setup Time to OE# low during toggle bit
polling
Min
15
ns
t
WLAX
t
AH
Address Hold Time
Min
40404550
ns
t
AHT
Address Hold Time From CE# or OE# high
during toggle bit polling
Min
0
ns
t
DVWH
t
DS
Data Setup Time
Min
40404550
ns
tWHDX
tDH
Data Hold Time
Min
0
ns
t
OEPH
Output Enable High during toggle bit polling
Min
20
ns
t
GHWL
t
GHWL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
t
ELWL
t
CS
CE# Setup Time
Min
0
ns
t
WHEH
t
CH
CE# Hold Time
Min
0
ns
t
WLWH
t
WP
Write Pulse Width
Min
30
30
35
50
ns
t
WHDL
t
WPH
Write Pulse Width High
Min
30
30
30
30
ns
t
SR/W
Latency Between Read and Write Operations
Min
0
ns
t
WHWH1
t
WHWH1
Programming Operation (Note 2)
Byte
Typ
5
µs
Word
Typ
7
t
WHWH1
t
WHWH1
Accelerated Programming Operation,
Word or Byte (Note 2)
Typ
4
µs
tWHWH2
tWHWH2
Sector Erase Operation (Note 2)
Typ
0.4
sec
t
VCS
V
CC Setup Time (Note 1)
Min
50
µs
t
RB
Write Recovery Time from RY/BY#
Min
0
ns
t
BUSY
Program/Erase Valid to RY/BY# Delay
Max
90
ns



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