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ADL6337ACRZA-R7 数据表(PDF) 29 Page - Analog Devices

部件名 ADL6337ACRZA-R7
功能描述  35 dB Gain, 500 MHz to 5200 MHz Transmit VGA
PDF  41 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  AD [Analog Devices]
网页  http://www.analog.com
标志 AD - Analog Devices

ADL6337ACRZA-R7 数据表(HTML) 29 Page - Analog Devices

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Data Sheet
ADL6337
REGISTER DETAILS
analog.com
Rev. B | 29 of 41
Address: 0x000, Reset: 0x00, Name: ADI_SPI_CONFIG
Table 20. Bit Descriptions for ADI_SPI_CONFIG
Bits
Bit Name
Description
Reset
Access
7
SOFTRESET_
Soft Reset for the Broadcasting Mode
0x0
R/W
0: Reset not asserted.
1: Reset asserted.
6
LSB_FIRST_
Least Significant Bit (LSB) First
0x0
R/W
0: Most Significant Bit (MSB) first
1: LSB first
5
ENDIAN_
Endian
0x0
R/W
0: Little Endian
1: Big Endian
4
SDOACTIVE_
SDO Active
0x0
R/W
0: SDO Inactive, 3-wire SPI Mode
1: SDO Active for 4-wire SPI Mode
3
SDOACTIVE
SDO Active
0x0
R/W
0: SDO Inactive, 3-wire SPI Mode
1: SDO Active for 4-wire SPI Mode
2
ENDIAN
Endian.
0x0
R/W
0: Little Endian
1: Big Endian
1
LSB_FIRST
LSB First
0x0
R/W
0: MSB first
1: LSB first.
0
SOFTRESET
Soft Reset for the Broadcasting Mode
0x0
R/W
0: Reset not asserted.
1: Reset asserted.
Address: 0x001, Reset: 0x00, Name: REG_0X0001
Table 21. Bit Descriptions for REG_0X0001
Bits
Bit Name
Description
Reset
Access
7
SINGLE_INSTRUCTION
Single Instruction. ADI internal.
0x0
R/W
6
CSB_STALL
CS Stall. ADI internal.
0x0
R/W
5
MASTER_SLAVE_RB
Master Slave RB. ADI internal.
0x0
R/W
[4:3]
RESERVED
Reserved. ADI internal.
0x0
R
[2:1]
SOFT_RESET
Soft Reset. ADI internal.
0x0
R/W
0
MASTER_SLAVE_TRANSFER
Master Slave Transfer. ADI internal.
0x0
R/W
Address: 0x003, Reset: 0x00, Name: CHIPTYPE
Table 22. Bit Descriptions for CHIPTYPE
Bits
Bit Name
Description
Reset
Access
[7:0]
CHIPTYPE
Chip Type, Read Only
0x0
R
Address: 0x004, Reset: 0x00, Name: PRODUCT_ID_L
Table 23. Bit Descriptions for PRODUCT_ID_L
Bits
Bit Name
Description
Reset
Access
[7:0]
PRODUCT_ID[7:0]
Product_ID_L, Lower 8 Bits
ADL6337
0x5B
R
Address: 0x005, Reset: 0x00, Name: PRODUCT_ID_H



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