Philips Semiconductors

Product specification

74F323

8-bit universal shift/storage register with synchronous

reset and common I/O pins (3-State)

1990 Mar 01

2

LOGIC SYMBOL

11

18

7

13

6

14

5

15

4

16

1

19

12

9

2

3

Q0

Q7

DS0

DS7

I/O0

I/O2

I/O4

I/O6

I/O1

I/O3

I/O5

I/O7

S0

S1

CP

OE0

OE1

SR

VCC = Pin 20

GND = Pin 10

8

17

SF00889

LOGIC SYMBOL (IEEE/IEC)

SF00890

&

3EN13

C4/1

→ /2←

9

4R

11

7

6

14

5

15

4

3

12

19

17

8

SRG8

1, 4D

2

1

0

3

M

0

1

3, 4D

5, 13

13

3, 4D

6, 13

3, 4D

12, 13

2, 4D

16

18

Z5

Z6

Z6

Z12

FUNCTION TABLE

INPUTS

OPERATING MODE

OEn

SR

S1

S0

CP

OPERATING MODE

L

L

X

X

↑

Synchronous Reset; Q0 - Q7 = Low

L

H

H

H

↑

Parallel load; I/On

→ Qn

L

H

L

H

↑

Shift right; DS0

→ Q0, Q0 → Q1, etc.

L

H

H

L

↑

Shift left; DS7

→ Q7, Q7 → Q6, etc.

L

H

L

L

X

Hold

H

X

X

X

X

Outputs disabled (3-state)

H = High voltage level

L = Low voltage level

X = Don’t care

↑ = Low-to-High clock transition