VIPER113XSTR datasheet(32/37 Pages) STMICROELECTRONICS

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Application information

VIPer11

32/37

DS11873 Rev 5

6.3

Layout guidelines and design recommendations

A proper printed circuit board layout ensures the correct operation of any switch-mode

converter and this is true for the VIPer as well. The main reasons to have a proper PCB

layout are:



Providing clean signals to the IC, ensuring good immunity against external and

switching noises.



Reducing the electromagnetic interferences, both radiated and conducted, to pass the

EMC tests more easily.

If the VIPer is used to design a SMPS, the following basic rules should be considered:



Separating signal from power tracks. Generally, traces carrying signal currents

should run far from others carrying pulsed currents or with fast swinging voltages.

Signal ground traces should be connected to the IC signal ground, GND, using a single

“star point”, placed close to the IC. Power ground traces should be connected to the IC

power ground, GND. The compensation network should be connected to the COMP,

maintaining the trace to GND as short as possible. In case of two-layer PCB, it is a

good practice to route signal traces on one PCB side and power traces on the other

side.



Filtering sensitive pins. Some crucial points of the circuit need or may need filtering.

A small high-frequency bypass capacitor to GND might be useful to get a clean bias

voltage for the signal part of the IC and protect the IC itself during EFT/ESD tests. A low

ESL ceramic capacitor (a few hundreds pF up to 0.1

F) should be connected across

VCC and GND, placed as close as possible to the IC. With flyback topologies, when

the auxiliary winding is used, it is suggested to connect the VCC capacitor on the

auxiliary return and then to the main GND using a single track.



Keeping power loops as confined as possible. The area circumscribed by current

loops where high pulsed current flow should be minimized to reduce its parasitic self-

inductance and the radiated electromagnetic field. As a consequence, the

electromagnetic interferences produced by the power supply during the switching are

highly reduced. In a flyback converter the most critical loops are: the one including the

input bulk capacitor, the power switch, the power transformer, the one including the

snubber, the one including the secondary winding, the output rectifier and the output

capacitor. In a buck converter the most critical loop is the one including the input bulk

capacitor, the power switch, the power inductor, the output capacitor and the free-

wheeling diode.



Reducing line lengths. Any wire acts as an antenna. With the very short rise times

exhibited by EFT pulses, any antenna can receive high voltage spikes. By reducing line

lengths, the level of received radiated energy is reduced, and the resulting spikes from

electrostatic discharges are lower. This also keeps both resistive and inductive effects

to a minimum. In particular, all traces carrying high currents, especially if pulsed (tracks

of the power loops) should be as short and wide as possible.



Optimizing track routing. As levels of pickup from static discharges are likely greater

near the edges of the board, it is wise to keep any sensitive lines away from these

areas. Input and output lines often need to reach the PCB edge at some stage, but they

can be routed away from the edge as soon as possible where applicable. Since vias

are to be considered inductive elements, it is recommended to minimize their number

in the signal path and avoid them in the power path.



Improving thermal dissipation. An adequate copper area has to be provided under

the DRAIN pins as heatsink, while it is not recommended to place large copper areas

on the GND.

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