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74F845 数据表(PDF) 12 Page - NXP Semiconductors

部件名 74F845
功能描述  Bus interface latches
PDF  18 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
制造商  PHILIPS [NXP Semiconductors]
网页  http://www.nxp.com
标志 PHILIPS - NXP Semiconductors

74F845 数据表(HTML) 12 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74F841/74F842/74F843/
74F845/74F846
Bus interface latches
1999 Jun 23
12
AC ELECTRICAL CHARACTERISTICS for 74F843/74F845
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST
VCC = +5.0V
VCC = +5.0V ± 10%
UNIT
CONDITION
CL = 50pF, RL = 500Ω
CL = 50pF, RL = 500Ω
MIN
TYP
MAX
MIN
MAX
tPLH
tPHL
Propagation delay
Dn to Qn
Waveform 1, 2
2.0
2.5
4.5
4.5
7.5
8.0
2.0
2.5
8.5
8.5
ns
tPLH
tPHL
Propagation delay
LE to Qn
Waveform 1, 2
4.5
4.0
6.5
6.0
9.5
8.5
4.5
4.0
10.0
8.5
ns
tPLH
Propagation delay
PRE to Qn
Waveform 3
3.5
5.5
8.5
3.0
9.0
ns
tPHL
Propagation delay
MR to Qn
Waveform 3
2.0
4.5
7.5
2.0
8.0
ns
tPZH
tPZL
Output enable time
High or Low-level OEn to Qn
Waveform 5
Waveform 6
2.5
4.0
4.5
6.0
7.5
9.5
2.0
3.0
8.0
10.5
ns
tPHZ
tPLZ
Output disable time
High or Low-level OEn to Qn
Waveform 5
Waveform 6
1.0
1.0
4.5
5.0
8.0
8.0
1.0
1.0
8.5
8.5
ns
AC SETUP REQUIREMENTS for 74F843/74F845
LIMITS
Tamb = +25°C
Tamb = 0°C to +70°C
SYMBOL
PARAMETER
TEST
VCC = +5.0V
VCC = +5.0V ± 10%
UNIT
CONDITION
CL = 50pF, RL = 500Ω
CL = 50pF, RL = 500Ω
MIN
TYP
MIN
MAX
ts(H)
ts(L)
Setup time, High or Low
Dn to LE
Waveform 4
1.0
1.0
0.0
0.0
ns
th(H)
th(L)
Hold time, High or Low
Dn to LE
Waveform 4
3.0
4.0
3.0
4.0
ns
tw(H)
LE pulse width, High
Waveform 4
3.0
3.0
ns
tw(L)
PRE pulse width, Low
Waveform 3
4.0
5.0
ns
tw(H)
MR pulse width, Low
Waveform 3
4.0
5.0
ns
tREC
PRE recovery time
Waveform 3
0.0
0.0
ns
tREC
MR recovery time
Waveform 3
3.5
4.5
ns



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